chore(rdv3): rename platform RD-Fremont to RD-V3

Arm has decided to rename RD-Fremont to RD-V3 to align with its
existing product lineup, such as RD-V1, RD-V2, etc. This change
replaces all occurences of "Fremont" with "V3" in file names and
contents.

Change-Id: I302103492f962a7ac74854633ad68701b2a7f420
Signed-off-by: Jerry Wang <Jerry.Wang4@arm.com>

changelog.yaml

@@ -241,8 +241,8 @@ subsections:
               - title: RD-N2
                 scope: rdn2
 
-              - title: RD-Fremont
-                scope: rdfremont
+              - title: RD-V3
+                scope: rdv3
 
                 deprecated:
                   - board/rdn2

plat/arm/board/neoverse_rd/common/include/nrd_variant.h

@@ -28,13 +28,13 @@
 #define RD_V2_SID_VER_PART_NUM			0x07F2
 #define RD_V2_CONFIG_ID				0x1
 
-/* SID Version values for RD-Fremont */
-#define RD_FREMONT_SID_VER_PART_NUM		0x07EE
-#define RD_FREMONT_CONFIG_ID			0x0
+/* SID Version values for RD-V3 */
+#define RD_V3_SID_VER_PART_NUM		0x07EE
+#define RD_V3_CONFIG_ID			0x0
 
-/* SID Version values for RD-Fremont variants */
-#define RD_FREMONT_CFG1_SID_VER_PART_NUM	0x07F9
-#define RD_FREMONT_CFG2_SID_VER_PART_NUM	0x07EE
+/* SID Version values for RD-V3 variants */
+#define RD_V3_CFG1_SID_VER_PART_NUM	0x07F9
+#define RD_V3_CFG2_SID_VER_PART_NUM	0x07EE
 
 /* Structure containing Neoverse RD platform variant information */
 typedef struct nrd_platform_info {

plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c

@@ -131,9 +131,9 @@ scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
 			panic();
 		}
 		return &plat_rd_scmi_info[channel_id];
-	} else if (nrd_plat_info.platform_id == RD_FREMONT_SID_VER_PART_NUM ||
-		nrd_plat_info.platform_id == RD_FREMONT_CFG1_SID_VER_PART_NUM ||
-		nrd_plat_info.platform_id == RD_FREMONT_CFG2_SID_VER_PART_NUM) {
+	} else if (nrd_plat_info.platform_id == RD_V3_SID_VER_PART_NUM ||
+		nrd_plat_info.platform_id == RD_V3_CFG1_SID_VER_PART_NUM ||
+		nrd_plat_info.platform_id == RD_V3_CFG2_SID_VER_PART_NUM) {
 		if (channel_id >= ARRAY_SIZE(plat3_rd_scmi_info)) {
 			panic();
 		}

plat/arm/board/neoverse_rd/platform/rdv3/fdts/rdv3_nt_fw_config.dts

@@ -7,7 +7,7 @@
 /dts-v1/;
 / {
 	/* compatible string */
-	compatible = "arm,rd-fremont";
+	compatible = "arm,rd-v3";
 
 	/*
 	 * Place holder for system-id node with default values. The

plat/arm/board/neoverse_rd/platform/rdv3/include/rdv3_mhuv3.h

@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef RDFREMONT_MHUV3_H
-#define RDFREMONT_MHUV3_H
+#ifndef RDV3_MHUV3_H
+#define RDV3_MHUV3_H
 
 void mhu_v3_get_secure_device_base(uintptr_t *base, bool sender);
 
-#endif /* RDFREMONT_MHUV3_H */
+#endif /* RDV3_MHUV3_H */

plat/arm/board/neoverse_rd/platform/rdv3/include/rdv3_rse_comms.h

@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef RDFREMONT_RSE_COMMS_H
-#define RDFREMONT_RSE_COMMS_H
+#ifndef RDV3_RSE_COMMS_H
+#define RDV3_RSE_COMMS_H
 
 int plat_rse_comms_init(void);
 
-#endif /* RDFREMONT_RSE_COMMS_H */
+#endif /* RDV3_RSE_COMMS_H */

plat/arm/board/neoverse_rd/platform/rdv3/platform.mk

@@ -3,16 +3,16 @@
 # SPDX-License-Identifier: BSD-3-Clause
 #
 
-RD_FREMONT_VARIANTS := 0 1 2
+RD_V3_VARIANTS := 0 1 2
 ifneq ($(NRD_PLATFORM_VARIANT),						\
-	$(filter $(NRD_PLATFORM_VARIANT),$(RD_FREMONT_VARIANTS)))
-	$(error "NRD_PLATFORM_VARIANT for RD-FREMONT should be 0, 1, or 2,"
+	$(filter $(NRD_PLATFORM_VARIANT),$(RD_V3_VARIANTS)))
+	$(error "NRD_PLATFORM_VARIANT for RD-V3 should be 0, 1, or 2,"
 	"currently set to ${NRD_PLATFORM_VARIANT}.")
 endif
 
 $(eval $(call CREATE_SEQ,SEQ,4))
 ifneq ($(NRD_CHIP_COUNT),$(filter $(NRD_CHIP_COUNT),$(SEQ)))
-	$(error  "Chip count for RD-Fremont-MC should be either $(SEQ) \
+	$(error  "Chip count for RD-V3-MC should be either $(SEQ) \
 	currently it is set to ${NRD_CHIP_COUNT}.")
 endif
 
@@ -30,7 +30,7 @@ override NEED_RMM			:= no
 # Misc options
 override CTX_INCLUDE_AARCH32_REGS	:= 0
 
-# RD-Fremont platform uses GIC-700 which is based on GICv4.1
+# RD-V3 platform uses GIC-700 which is based on GICv4.1
 GIC_ENABLE_V4_EXTN			:= 1
 
 # Enable GIC multichip extension only for multichip platforms
@@ -38,7 +38,7 @@ ifeq (${NRD_PLATFORM_VARIANT}, 2)
 GICV3_IMPL_GIC600_MULTICHIP	:= 1
 endif
 
-# RD-Fremont uses MHUv3
+# RD-V3 uses MHUv3
 PLAT_MHU_VERSION := 3
 
 include plat/arm/board/neoverse_rd/common/nrd-common.mk
@@ -48,58 +48,58 @@ ifeq (${MEASURED_BOOT},1)
 include drivers/measured_boot/rse/rse_measured_boot.mk
 endif
 
-RDFREMONT_BASE	=	plat/arm/board/neoverse_rd/platform/rdfremont
+RDV3_BASE	=	plat/arm/board/neoverse_rd/platform/rdv3
 
 PLAT_INCLUDES	+=	-I${NRD_COMMON_BASE}/include/nrd3/		\
-			-I${RDFREMONT_BASE}/include/			\
+			-I${RDV3_BASE}/include/			\
 			-Iinclude/lib/psa
 
 NRD_CPU_SOURCES	:=	lib/cpus/aarch64/neoverse_v3.S
 
-# Source files for RD-Fremont variants
+# Source files for RD-V3 variants
 PLAT_BL_COMMON_SOURCES							\
 		+=	${NRD_COMMON_BASE}/nrd_plat3.c			\
-			${RDFREMONT_BASE}/rdfremont_common.c
+			${RDV3_BASE}/rdv3_common.c
 
 PLAT_MEASURED_BOOT_SOURCES						\
 		:=	${MEASURED_BOOT_SOURCES} 			\
 			${RSE_COMMS_SOURCES}				\
-			${RDFREMONT_BASE}/rdfremont_common_measured_boot.c \
+			${RDV3_BASE}/rdv3_common_measured_boot.c \
 			lib/psa/measured_boot.c
 
 BL1_SOURCES	+=	${NRD_CPU_SOURCES}				\
-			${RDFREMONT_BASE}/rdfremont_err.c		\
-			${RDFREMONT_BASE}/rdfremont_mhuv3.c
+			${RDV3_BASE}/rdv3_err.c		\
+			${RDV3_BASE}/rdv3_mhuv3.c
 ifeq (${TRUSTED_BOARD_BOOT}, 1)
-BL1_SOURCES	+=	${RDFREMONT_BASE}/rdfremont_trusted_boot.c
+BL1_SOURCES	+=	${RDV3_BASE}/rdv3_trusted_boot.c
 endif
 ifeq (${MEASURED_BOOT},1)
 BL1_SOURCES	+=	${PLAT_MEASURED_BOOT_SOURCES}			\
-			${RDFREMONT_BASE}/rdfremont_bl1_measured_boot.c
+			${RDV3_BASE}/rdv3_bl1_measured_boot.c
 endif
 
-BL2_SOURCES	+=	${RDFREMONT_BASE}/rdfremont_bl2_setup.c		\
-			${RDFREMONT_BASE}/rdfremont_err.c		\
-			${RDFREMONT_BASE}/rdfremont_mhuv3.c		\
-			${RDFREMONT_BASE}/rdfremont_security.c		\
+BL2_SOURCES	+=	${RDV3_BASE}/rdv3_bl2_setup.c		\
+			${RDV3_BASE}/rdv3_err.c		\
+			${RDV3_BASE}/rdv3_mhuv3.c		\
+			${RDV3_BASE}/rdv3_security.c		\
 			lib/utils/mem_region.c				\
 			plat/arm/common/arm_nor_psci_mem_protect.c
 ifeq (${TRUSTED_BOARD_BOOT}, 1)
-BL2_SOURCES	+=	${RDFREMONT_BASE}/rdfremont_trusted_boot.c
+BL2_SOURCES	+=	${RDV3_BASE}/rdv3_trusted_boot.c
 endif
 ifeq (${MEASURED_BOOT},1)
 BL2_SOURCES	+=	${PLAT_MEASURED_BOOT_SOURCES}			\
-			${RDFREMONT_BASE}/rdfremont_bl2_measured_boot.c
+			${RDV3_BASE}/rdv3_bl2_measured_boot.c
 endif
 
 BL31_SOURCES	+=	${NRD_CPU_SOURCES}				\
 			${MBEDTLS_SOURCES}				\
 			${RSE_COMMS_SOURCES}				\
-			${RDFREMONT_BASE}/rdfremont_bl31_setup.c	\
-			${RDFREMONT_BASE}/rdfremont_mhuv3.c		\
-			${RDFREMONT_BASE}/rdfremont_topology.c		\
-			${RDFREMONT_BASE}/rdfremont_plat_attest_token.c	\
-			${RDFREMONT_BASE}/rdfremont_realm_attest_key.c	\
+			${RDV3_BASE}/rdv3_bl31_setup.c	\
+			${RDV3_BASE}/rdv3_mhuv3.c		\
+			${RDV3_BASE}/rdv3_topology.c		\
+			${RDV3_BASE}/rdv3_plat_attest_token.c	\
+			${RDV3_BASE}/rdv3_realm_attest_key.c	\
 			drivers/arm/smmu/smmu_v3.c			\
 			drivers/cfi/v2m/v2m_flash.c			\
 			lib/psa/cca_attestation.c			\
@@ -111,14 +111,14 @@ ifeq (${NRD_PLATFORM_VARIANT}, 2)
 BL31_SOURCES	+=	drivers/arm/gic/v3/gic600_multichip.c
 endif
 
-# XLAT options for RD-Fremont variants
+# XLAT options for RD-V3 variants
 BL31_CFLAGS	+=      -DPLAT_XLAT_TABLES_DYNAMIC
 BL2_CFLAGS	+=      -DPLAT_XLAT_TABLES_DYNAMIC
 
 # Add the FDT_SOURCES and options for Dynamic Config
-FDT_SOURCES	+=	${RDFREMONT_BASE}/fdts/${PLAT}_fw_config.dts	\
-			${RDFREMONT_BASE}/fdts/${PLAT}_tb_fw_config.dts \
-			${RDFREMONT_BASE}/fdts/${PLAT}_nt_fw_config.dts
+FDT_SOURCES	+=	${RDV3_BASE}/fdts/${PLAT}_fw_config.dts	\
+			${RDV3_BASE}/fdts/${PLAT}_tb_fw_config.dts \
+			${RDV3_BASE}/fdts/${PLAT}_nt_fw_config.dts
 
 FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
 TB_FW_CONFIG	:=	${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
@@ -131,7 +131,7 @@ $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
 # Add the NT_FW_CONFIG to FIP and specify the same to certtool
 $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
 
-# Features for RD-Fremont variants
+# Features for RD-V3 variants
 override ENABLE_FEAT_MPAM	:= 2
 override ENABLE_FEAT_AMU	:= 2
 override ENABLE_SVE_FOR_SWD	:= 1

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_bl1_measured_boot.c

@@ -13,13 +13,13 @@
 #include <platform_def.h>
 
 #include <nrd_plat.h>
-#include <rdfremont_rse_comms.h>
+#include <rdv3_rse_comms.h>
 
 /*
  * Platform specific table with image IDs and metadata. Intentionally not a
  * const struct, some members might set by bootloaders during trusted boot.
  */
-struct rse_mboot_metadata rdfremont_rse_mboot_metadata[] = {
+struct rse_mboot_metadata rdv3_rse_mboot_metadata[] = {
 	{
 		.id = FW_CONFIG_ID,
 		.slot = U(8),
@@ -51,7 +51,7 @@ void bl1_plat_mboot_init(void)
 	/* Initialize the communication channel between AP and RSE */
 	(void)plat_rse_comms_init();
 
-	rse_measured_boot_init(rdfremont_rse_mboot_metadata);
+	rse_measured_boot_init(rdv3_rse_mboot_metadata);
 }
 
 void bl1_plat_mboot_finish(void)

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_bl2_measured_boot.c

@@ -13,13 +13,13 @@
 #include <platform_def.h>
 
 #include <nrd_plat.h>
-#include <rdfremont_rse_comms.h>
+#include <rdv3_rse_comms.h>
 
 /*
  * Platform specific table with image IDs and metadata. Intentionally not a
  * const struct, some members might set by bootloaders during trusted boot.
  */
-struct rse_mboot_metadata rdfremont_rse_mboot_metadata[] = {
+struct rse_mboot_metadata rdv3_rse_mboot_metadata[] = {
 	{
 		.id = BL31_IMAGE_ID,
 		.slot = U(11),
@@ -60,7 +60,7 @@ void bl2_plat_mboot_init(void)
 	/* Initialize the communication channel between AP and RSE */
 	(void)plat_rse_comms_init();
 
-	rse_measured_boot_init(rdfremont_rse_mboot_metadata);
+	rse_measured_boot_init(rdv3_rse_mboot_metadata);
 }
 
 void bl2_plat_mboot_finish(void)

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_bl31_setup.c

@@ -13,10 +13,10 @@
 #include <plat/common/platform.h>
 #include <nrd_plat.h>
 #include <nrd_variant.h>
-#include <rdfremont_rse_comms.h>
+#include <rdv3_rse_comms.h>
 
 #if (NRD_PLATFORM_VARIANT == 2)
-static const mmap_region_t rdfremontmc_dynamic_mmap[] = {
+static const mmap_region_t rdv3mc_dynamic_mmap[] = {
 #if NRD_CHIP_COUNT > 1
 	NRD_CSS_SHARED_RAM_MMAP(1),
 	NRD_CSS_PERIPH_MMAP(1),
@@ -31,7 +31,7 @@ static const mmap_region_t rdfremontmc_dynamic_mmap[] = {
 #endif
 };
 
-static struct gic600_multichip_data rdfremontmc_multichip_data __init = {
+static struct gic600_multichip_data rdv3mc_multichip_data __init = {
 	.rt_owner_base = PLAT_ARM_GICD_BASE,
 	.rt_owner = 0,
 	.chip_count = NRD_CHIP_COUNT,
@@ -61,7 +61,7 @@ static struct gic600_multichip_data rdfremontmc_multichip_data __init = {
 	}
 };
 
-static uintptr_t rdfremontmc_multichip_gicr_frames[] = {
+static uintptr_t rdv3mc_multichip_gicr_frames[] = {
 	/* Chip 0's GICR Base */
 	PLAT_ARM_GICR_BASE,
 #if NRD_CHIP_COUNT > 1
@@ -84,7 +84,7 @@ void bl31_platform_setup(void)
 {
 	/*
 	 * Perform SMMUv3 GPT configuration for the GPC SMMU present in system
-	 * control block on RD-Fremont platforms. This SMMUv3 initialization is
+	 * control block on RD-V3 platforms. This SMMUv3 initialization is
 	 * not fatal.
 	 *
 	 * Don't perform smmuv3_security_init() for this instance of SMMUv3 as
@@ -104,14 +104,14 @@ void bl31_platform_setup(void)
 		       NRD_CHIP_COUNT);
 		panic();
 	} else {
-		INFO("Enabling multi-chip support for RD-Fremont variant\n");
+		INFO("Enabling multi-chip support for RD-V3 variant\n");
 
-		for (i = 0; i < ARRAY_SIZE(rdfremontmc_dynamic_mmap); i++) {
+		for (i = 0; i < ARRAY_SIZE(rdv3mc_dynamic_mmap); i++) {
 			ret = mmap_add_dynamic_region(
-					rdfremontmc_dynamic_mmap[i].base_pa,
-					rdfremontmc_dynamic_mmap[i].base_va,
-					rdfremontmc_dynamic_mmap[i].size,
-					rdfremontmc_dynamic_mmap[i].attr);
+					rdv3mc_dynamic_mmap[i].base_pa,
+					rdv3mc_dynamic_mmap[i].base_va,
+					rdv3mc_dynamic_mmap[i].size,
+					rdv3mc_dynamic_mmap[i].attr);
 			if (ret != 0) {
 				ERROR("Failed to add entry i: %d (ret=%d)\n",
 				       i, ret);
@@ -120,8 +120,8 @@ void bl31_platform_setup(void)
 		}
 
 		plat_arm_override_gicr_frames(
-			rdfremontmc_multichip_gicr_frames);
-		gic600_multichip_init(&rdfremontmc_multichip_data);
+			rdv3mc_multichip_gicr_frames);
+		gic600_multichip_init(&rdv3mc_multichip_data);
 	}
 #endif /* NRD_PLATFORM_VARIANT == 2 */
 	nrd_bl31_common_platform_setup();

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_common.c

@@ -11,8 +11,8 @@
 #include <plat/common/platform.h>
 #include <platform_def.h>
 #include <nrd_plat.h>
-#include <rdfremont_mhuv3.h>
-#include <rdfremont_rse_comms.h>
+#include <rdv3_mhuv3.h>
+#include <rdv3_rse_comms.h>
 
 unsigned int plat_arm_nrd_get_platform_id(void)
 {

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_common_measured_boot.c

@@ -10,11 +10,11 @@
 #include <common/desc_image_load.h>
 #include <drivers/measured_boot/rse/rse_measured_boot.h>
 
-extern struct rse_mboot_metadata rdfremont_rse_mboot_metadata[];
+extern struct rse_mboot_metadata rdv3_rse_mboot_metadata[];
 
 struct rse_mboot_metadata *plat_rse_mboot_get_metadata(void)
 {
-	return rdfremont_rse_mboot_metadata;
+	return rdv3_rse_mboot_metadata;
 }
 
 int plat_mboot_measure_image(unsigned int image_id, image_info_t *image_data)
@@ -22,7 +22,7 @@ int plat_mboot_measure_image(unsigned int image_id, image_info_t *image_data)
 	int err;
 
 	/* Calculate image hash and record data in RSE */
-	err = rse_mboot_measure_and_record(rdfremont_rse_mboot_metadata,
+	err = rse_mboot_measure_and_record(rdv3_rse_mboot_metadata,
 					   image_data->image_base,
 					   image_data->image_size,
 					   image_id);
@@ -36,6 +36,6 @@ int plat_mboot_measure_image(unsigned int image_id, image_info_t *image_data)
 
 int plat_mboot_measure_key(void *pk_oid, void *pk_ptr, unsigned int pk_len)
 {
-	return rse_mboot_set_signer_id(rdfremont_rse_mboot_metadata, pk_oid,
+	return rse_mboot_set_signer_id(rdv3_rse_mboot_metadata, pk_oid,
 				       pk_ptr, pk_len);
 }

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_err.c

@@ -7,7 +7,7 @@
 #include <plat/arm/common/plat_arm.h>
 
 /*
- * rdfremont error handler
+ * rdv3 error handler
  */
 void __dead2 plat_arm_error_handler(int err)
 {

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_mhuv3.c

@@ -11,7 +11,7 @@
 
 #include <nrd_css_def3.h>
 #include <nrd_plat.h>
-#include <rdfremont_mhuv3.h>
+#include <rdv3_mhuv3.h>
 
 void mhu_v3_get_secure_device_base(uintptr_t *base, bool sender)
 {

plat/arm/board/neoverse_rd/platform/rdv3/rdv3_topology.c

@@ -10,7 +10,7 @@
 /******************************************************************************
  * The power domain tree descriptor.
  ******************************************************************************/
-const unsigned char rd_fremont_pd_tree_desc[] = {
+const unsigned char rd_v3_pd_tree_desc[] = {
 	(PLAT_ARM_CLUSTER_COUNT) * (NRD_CHIP_COUNT),
 	NRD_MAX_CPUS_PER_CLUSTER,
 	NRD_MAX_CPUS_PER_CLUSTER,
@@ -44,7 +44,7 @@ const unsigned char rd_fremont_pd_tree_desc[] = {
  ******************************************************************************/
 const unsigned char *plat_get_power_domain_tree_desc(void)
 {
-	return rd_fremont_pd_tree_desc;
+	return rd_v3_pd_tree_desc;
 }
 
 /*******************************************************************************