refactor(cpufeat): enable FEAT_TWED for FEAT_STATE_CHECKED

At the moment we only support FEAT_TWED to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime detection (ENABLE_FEAT_TWED=2), by splitting
is_armv8_6_twed_present() into an ID register reading function and a
second function to report the support status. That function considers
both build time settings and runtime information (if needed), and is
used before we set the trap delay time.

Change the FVP platform default to the now supported dynamic option (=2),
so the right decision can be made by the code at runtime.

Change-Id: I58626230ef0af49886c0a197abace01e81f661d2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2023-01-27 12:25:49 +00:00
parent 7db710f0cb
commit 1223d2a020
4 changed files with 26 additions and 22 deletions

View file

@ -154,16 +154,6 @@ static void read_feat_amuv1p1(void)
#endif
}
/***********************************************************
* Feature : FEAT_TWED (Delayed Trapping of WFE Instruction)
**********************************************************/
static void read_feat_twed(void)
{
#if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS)
feat_detect_panic(is_armv8_6_twed_present(), "TWED");
#endif
}
/**************************************************
* Feature : FEAT_RME (Realm Management Extension)
*************************************************/
@ -248,7 +238,8 @@ void detect_arch_features(void)
read_feat_amuv1p1();
check_feature(ENABLE_FEAT_FGT, read_feat_fgt_id_field(), "FGT", 1, 1);
check_feature(ENABLE_FEAT_ECV, read_feat_ecv_id_field(), "ECV", 1, 2);
read_feat_twed();
check_feature(ENABLE_FEAT_TWED, read_feat_twed_id_field(),
"TWED", 1, 1);
/* v8.7 features */
check_feature(ENABLE_FEAT_HCX, read_feat_hcx_id_field(), "HCX", 1, 1);

View file

@ -119,10 +119,22 @@ static inline bool is_armv8_4_sel2_present(void)
ID_AA64PFR0_SEL2_MASK) == 1ULL;
}
static inline bool is_armv8_6_twed_present(void)
static inline unsigned int read_feat_twed_id_field(void)
{
return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) &
ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED);
return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED);
}
static inline bool is_feat_twed_supported(void)
{
if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) {
return false;
}
if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) {
return true;
}
return read_feat_twed_id_field() != 0U;
}
static unsigned int read_feat_fgt_id_field(void)

View file

@ -385,16 +385,16 @@ static void setup_context_common(cpu_context_t *ctx, const entry_point_info_t *e
}
}
#if ENABLE_FEAT_TWED
/* Enable WFE trap delay in SCR_EL3 if supported and configured */
/* Set delay in SCR_EL3 */
scr_el3 &= ~(SCR_TWEDEL_MASK << SCR_TWEDEL_SHIFT);
scr_el3 |= ((TWED_DELAY & SCR_TWEDEL_MASK)
<< SCR_TWEDEL_SHIFT);
if (is_feat_twed_supported()) {
/* Set delay in SCR_EL3 */
scr_el3 &= ~(SCR_TWEDEL_MASK << SCR_TWEDEL_SHIFT);
scr_el3 |= ((TWED_DELAY & SCR_TWEDEL_MASK)
<< SCR_TWEDEL_SHIFT);
/* Enable WFE delay */
scr_el3 |= SCR_TWEDEn_BIT;
#endif /* ENABLE_FEAT_TWED */
/* Enable WFE delay */
scr_el3 |= SCR_TWEDEn_BIT;
}
/*
* Populate EL3 state so that we've the right context

View file

@ -473,6 +473,7 @@ ENABLE_FEAT_TCR2 := 2
ENABLE_FEAT_CSV2_2 := 2
ENABLE_FEAT_ECV := 2
ENABLE_FEAT_PAN := 2
ENABLE_FEAT_TWED := 2
ENABLE_FEAT_VHE := 2
ENABLE_MPAM_FOR_LOWER_ELS := 2