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Miscellaneous doc fixes for v1.1
Change-Id: Iaf9d6305edc478d39cf1b37c8a70ccdf723e8ef9
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4 changed files with 9 additions and 12 deletions
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@ -21,7 +21,7 @@ for a specific CPU on a platform.
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ARM Trusted Firmware exports a series of build flags which control the
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ARM Trusted Firmware exports a series of build flags which control the
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errata workarounds that are applied to each CPU by the reset handler. The
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errata workarounds that are applied to each CPU by the reset handler. The
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errata details can be found in the CPU specifc errata documents published
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errata details can be found in the CPU specific errata documents published
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by ARM. The errata workarounds are implemented for a particular revision
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by ARM. The errata workarounds are implemented for a particular revision
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or a set of processor revisions. This is checked by reset handler at runtime.
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or a set of processor revisions. This is checked by reset handler at runtime.
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Each errata workaround is identified by its `ID` as specified in the processor's
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Each errata workaround is identified by its `ID` as specified in the processor's
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@ -425,7 +425,7 @@ EL3, little-endian data access, and all interrupt sources masked:
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PSTATE.EL = 3
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PSTATE.EL = 3
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PSTATE.RW = 1
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PSTATE.RW = 1
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PSTATE.DAIF = 0xf
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PSTATE.DAIF = 0xf
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CTLR_EL3.EE = 0
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SCTLR_EL3.EE = 0
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X0 and X1 can be used to pass information from the Trusted Boot Firmware to the
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X0 and X1 can be used to pass information from the Trusted Boot Firmware to the
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platform code in BL3-1:
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platform code in BL3-1:
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@ -1060,9 +1060,9 @@ of any coherency domain.
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The BL entrypoint code first invokes the `plat_reset_handler()` to allow
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The BL entrypoint code first invokes the `plat_reset_handler()` to allow
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the platform to perform any system initialization required and any system
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the platform to perform any system initialization required and any system
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errata wrokarounds that needs to be applied. The `get_cpu_ops_ptr()` reads
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errata workarounds that needs to be applied. The `get_cpu_ops_ptr()` reads
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the current CPU midr, finds the matching `cpu_ops` entry in the `cpu_ops`
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the current CPU midr, finds the matching `cpu_ops` entry in the `cpu_ops`
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array and returns it. Note that only the part number and implementator fields
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array and returns it. Note that only the part number and implementer fields
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in midr are used to find the matching `cpu_ops` entry. The `reset_func()` in
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in midr are used to find the matching `cpu_ops` entry. The `reset_func()` in
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the returned `cpu_ops` is then invoked which executes the required reset
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the returned `cpu_ops` is then invoked which executes the required reset
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handling for that CPU and also any errata workarounds enabled by the platform.
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handling for that CPU and also any errata workarounds enabled by the platform.
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@ -1445,9 +1445,10 @@ function uses the storage layer to access non-volatile platform storage.
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It is mandatory to implement at least one storage driver. For the FVP the
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It is mandatory to implement at least one storage driver. For the FVP the
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Firmware Image Package(FIP) driver is provided as the default means to load data
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Firmware Image Package(FIP) driver is provided as the default means to load data
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from storage (see the "Firmware Image Package" section in the [User Guide]).
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from storage (see the "Firmware Image Package" section in the [User Guide]).
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The storage layer is described in the header file `include/io_storage.h`. The
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The storage layer is described in the header file
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implementation of the common library is in `lib/io_storage.c` and the driver
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`include/drivers/io/io_storage.h`. The implementation of the common library
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files are located in `drivers/io/`.
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is in `drivers/io/io_storage.c` and the driver files are located in
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`drivers/io/`.
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Each IO driver must provide `io_dev_*` structures, as described in
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Each IO driver must provide `io_dev_*` structures, as described in
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`drivers/io/io_driver.h`. These are returned via a mandatory registration
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`drivers/io/io_driver.h`. These are returned via a mandatory registration
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@ -511,7 +511,7 @@ Preparing a Linux kernel for use on the FVPs can be done as follows
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git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Not all required features are available in the kernel mainline yet. These
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Not all required features are available in the kernel mainline yet. These
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can be obtained from the ARM-software EDK2 repository instead:
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can be obtained from the ARM-software Linux repository instead:
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cd linux
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cd linux
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git remote add -f --tags arm-software https://github.com/ARM-software/linux.git
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git remote add -f --tags arm-software https://github.com/ARM-software/linux.git
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@ -790,7 +790,6 @@ with 8 CPUs using the ARM Trusted Firmware.
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-C cluster0.NUM_CORES=4 \
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-C cluster0.NUM_CORES=4 \
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-C cluster1.NUM_CORES=4 \
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-C cluster1.NUM_CORES=4 \
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-C cache_state_modelled=1 \
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-C cache_state_modelled=1 \
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-C bp.pl011_uart0.untimed_fifos=1 \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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@ -808,7 +807,6 @@ boot Linux with 8 CPUs using the ARM Trusted Firmware.
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-C bp.secure_memory=1 \
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-C bp.secure_memory=1 \
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-C bp.tzc_400.diagnostics=1 \
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-C bp.tzc_400.diagnostics=1 \
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-C cache_state_modelled=1 \
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-C cache_state_modelled=1 \
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-C bp.pl011_uart0.untimed_fifos=1 \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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-C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
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@ -828,7 +826,6 @@ with 8 CPUs using the ARM Trusted Firmware.
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-C cluster0.NUM_CORES=4 \
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-C cluster0.NUM_CORES=4 \
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-C cluster1.NUM_CORES=4 \
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-C cluster1.NUM_CORES=4 \
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-C cache_state_modelled=1 \
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-C cache_state_modelled=1 \
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-C bp.pl011_uart0.untimed_fifos=1 \
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-C cluster0.cpu0.RVBAR=0x04023000 \
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-C cluster0.cpu0.RVBAR=0x04023000 \
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-C cluster0.cpu1.RVBAR=0x04023000 \
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-C cluster0.cpu1.RVBAR=0x04023000 \
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-C cluster0.cpu2.RVBAR=0x04023000 \
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-C cluster0.cpu2.RVBAR=0x04023000 \
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@ -855,7 +852,6 @@ boot Linux with 8 CPUs using the ARM Trusted Firmware.
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-C bp.secure_memory=1 \
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-C bp.secure_memory=1 \
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-C bp.tzc_400.diagnostics=1 \
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-C bp.tzc_400.diagnostics=1 \
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-C cache_state_modelled=1 \
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-C cache_state_modelled=1 \
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-C bp.pl011_uart0.untimed_fifos=1 \
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-C cluster0.cpu0.RVBARADDR=0x04023000 \
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-C cluster0.cpu0.RVBARADDR=0x04023000 \
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-C cluster0.cpu1.RVBARADDR=0x04023000 \
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-C cluster0.cpu1.RVBARADDR=0x04023000 \
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-C cluster0.cpu2.RVBARADDR=0x04023000 \
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-C cluster0.cpu2.RVBARADDR=0x04023000 \
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