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Workaround for Neoverse N1 erratum 1262888
Neoverse N1 erratum 1262888 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUECTLR_EL1 system register, which disables the MMU hardware prefetcher. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: Ib733d748e32a7ea6a2783f3d5a9c5e13eee01105 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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docs/design
include/lib/cpus/aarch64
lib/cpus
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@ -249,6 +249,9 @@ For Neoverse N1, the following errata build flags are defined :
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- ``ERRATA_N1_1262606``: This applies errata 1262606 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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- ``ERRATA_N1_1262888``: This applies errata 1262888 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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- ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1
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CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
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@ -31,6 +31,7 @@
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#define NEOVERSE_N1_CPUECTLR_EL1 S3_0_C15_C1_4
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#define NEOVERSE_N1_WS_THR_L2_MASK (ULL(3) << 24)
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#define NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT (ULL(1) << 51)
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions.
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@ -265,6 +265,33 @@ func check_errata_1262606
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b cpu_rev_var_ls
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endfunc check_errata_1262606
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1262888
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* This applies to revision <=r3p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1262888_wa
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/* Compare x0 against revision r3p0 */
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mov x17, x30
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bl check_errata_1262888
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUECTLR_EL1
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orr x1, x1, NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT
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msr NEOVERSE_N1_CPUECTLR_EL1, x1
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isb
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1:
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ret x17
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endfunc errata_n1_1262888_wa
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func check_errata_1262888
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/* Applies to <=r3p0 */
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mov x1, #0x30
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b cpu_rev_var_ls
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endfunc check_errata_1262888
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Erratum 1315703.
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* This applies to revision <= r3p0 of Neoverse N1.
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@ -348,6 +375,11 @@ func neoverse_n1_reset_func
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bl errata_n1_1262606_wa
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#endif
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#if ERRATA_N1_1262888
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mov x0, x18
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bl errata_n1_1262888_wa
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#endif
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#if ERRATA_N1_1315703
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mov x0, x18
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bl errata_n1_1315703_wa
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@ -417,6 +449,7 @@ func neoverse_n1_errata_report
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report_errata ERRATA_N1_1220197, neoverse_n1, 1220197
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report_errata ERRATA_N1_1257314, neoverse_n1, 1257314
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report_errata ERRATA_N1_1262606, neoverse_n1, 1262606
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report_errata ERRATA_N1_1262888, neoverse_n1, 1262888
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report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
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report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
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@ -266,6 +266,10 @@ ERRATA_N1_1257314 ?=0
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# only to revision <= r3p0 of the Neoverse N1 cpu.
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ERRATA_N1_1262606 ?=0
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# Flag to apply erratum 1262888 workaround during reset. This erratum applies
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# only to revision <= r3p0 of the Neoverse N1 cpu.
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ERRATA_N1_1262888 ?=0
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# Flag to apply erratum 1315703 workaround during reset. This erratum applies
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# to revisions before r3p1 of the Neoverse N1 cpu.
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ERRATA_N1_1315703 ?=1
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@ -487,6 +491,10 @@ $(eval $(call add_define,ERRATA_N1_1257314))
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$(eval $(call assert_boolean,ERRATA_N1_1262606))
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$(eval $(call add_define,ERRATA_N1_1262606))
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# Process ERRATA_N1_1262888 flag
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$(eval $(call assert_boolean,ERRATA_N1_1262888))
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$(eval $(call add_define,ERRATA_N1_1262888))
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# Process ERRATA_N1_1315703 flag
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$(eval $(call assert_boolean,ERRATA_N1_1315703))
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$(eval $(call add_define,ERRATA_N1_1315703))
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