From 6cb8be17a53f4e11880ba13b78fca15895281cfe Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Tue, 17 Oct 2023 05:56:01 -0500 Subject: [PATCH 1/4] fix(cpus): workaround for Neoverse N2 erratum 2346952 Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all revisions <= r0p2 and is fixed in r0p3. The workaround is to set L2 TQ size statically to it's full size. SDEN documentation: https://developer.arm.com/documentation/SDEN-1982442/latest Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d Signed-off-by: Bipin Ravi --- docs/design/cpu-specific-build-macros.rst | 4 ++++ include/lib/cpus/aarch64/neoverse_n2.h | 5 ++++- lib/cpus/aarch64/neoverse_n2.S | 10 ++++++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/errata_abi_main.c | 15 ++++++++------- 5 files changed, 30 insertions(+), 8 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 146026b4a..0b0184076 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -655,6 +655,10 @@ For Neoverse N2, the following errata build flags are defined : CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in r0p1. +- ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 + CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, + it is fixed in r0p3. + - ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. diff --git a/include/lib/cpus/aarch64/neoverse_n2.h b/include/lib/cpus/aarch64/neoverse_n2.h index 0d5085433..b379faba6 100644 --- a/include/lib/cpus/aarch64/neoverse_n2.h +++ b/include/lib/cpus/aarch64/neoverse_n2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, Arm Limited. All rights reserved. + * Copyright (c) 2020-2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -65,5 +65,8 @@ #define NEOVERSE_N2_CPUECTLR2_EL1_PF_MODE_CNSRV ULL(9) #define CPUECTLR2_EL1_PF_MODE_LSB U(11) #define CPUECTLR2_EL1_PF_MODE_WIDTH U(4) +#define CPUECTLR2_EL1_TXREQ_STATIC_FULL ULL(0) +#define CPUECTLR2_EL1_TXREQ_LSB U(0) +#define CPUECTLR2_EL1_TXREQ_WIDTH U(3) #endif /* NEOVERSE_N2_H */ diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index ead390800..f80115177 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -165,6 +165,16 @@ workaround_runtime_end neoverse_n2, ERRATUM(2326639) check_erratum_ls neoverse_n2, ERRATUM(2326639), CPU_REV(0, 0) +workaround_runtime_start neoverse_n2, ERRATUM(2346952), ERRATA_N2_2346952 + /* Set TXREQ to STATIC and full L2 TQ size */ + mrs x1, NEOVERSE_N2_CPUECTLR2_EL1 + mov x0, #CPUECTLR2_EL1_TXREQ_STATIC_FULL + bfi x1, x0, #CPUECTLR2_EL1_TXREQ_LSB, #CPUECTLR2_EL1_TXREQ_WIDTH + msr NEOVERSE_N2_CPUECTLR2_EL1, x1 +workaround_runtime_end neoverse_n2, ERRATUM(2346952) + +check_erratum_ls neoverse_n2, ERRATUM(2346952), CPU_REV(0, 2) + workaround_reset_start neoverse_n2, ERRATUM(2376738), ERRATA_N2_2376738 /* Set CPUACTLR2_EL1[0] to 1 to force PLDW/PFRM * ST to behave like PLD/PFRM LD and not cause diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index ea2904724..92c6aa491 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -660,6 +660,10 @@ CPU_FLAG_LIST += ERRATA_N2_2280757 # applies to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2326639 +# Flag to apply erratum 2346952 workaround during reset. This erratum applies +# to r0p0, r0p1, r0p2 of the Neoverse N2 cpu, it is fixed in r0p3. +CPU_FLAG_LIST += ERRATA_N2_2346952 + # Flag to apply erratum 2376738 workaround during reset. This erratum applies # to revision r0p0, r0p1, r0p2, r0p3 of the Neoverse N2 cpu and is still open. CPU_FLAG_LIST += ERRATA_N2_2376738 diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index 38ba638d0..06c38721f 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -350,14 +350,15 @@ struct em_cpu_list cpu_list[] = { [9] = {2242415, 0x00, 0x00, ERRATA_N2_2242415}, [10] = {2280757, 0x00, 0x00, ERRATA_N2_2280757}, [11] = {2326639, 0x00, 0x00, ERRATA_N2_2326639}, - [12] = {2376738, 0x00, 0x03, ERRATA_N2_2376738}, - [13] = {2388450, 0x00, 0x00, ERRATA_N2_2388450}, - [14] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \ + [12] = {2346952, 0x00, 0x02, ERRATA_N2_2346952}, + [13] = {2376738, 0x00, 0x00, ERRATA_N2_2376738}, + [14] = {2388450, 0x00, 0x00, ERRATA_N2_2388450}, + [15] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \ ERRATA_NON_ARM_INTERCONNECT}, - [15] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, - [16] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, - [17] = {2779511, 0x00, 0x02, ERRATA_N2_2779511}, - [18 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [16] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, + [17] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, + [18] = {2779511, 0x00, 0x02, ERRATA_N2_2779511}, + [19 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* NEOVERSE_N2_H_INC */ From 68085ad4827ac7daa39767d479d0565daa32cb47 Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Tue, 17 Oct 2023 06:21:15 -0500 Subject: [PATCH 2/4] fix(cpus): workaround for Neoverse N2 erratum 2340933 Neoverse N2 erratum 2340933 is a Cat B erratum that applies to revision r0p0 and is fixed in r0p1. The workaround is to set CPUACTLR5_EL1[61] to 1. SDEN documentation: https://developer.arm.com/documentation/SDEN-1982442/latest Change-Id: I121add0dd35072c53392d33f049d893a5ff6354f Signed-off-by: Bipin Ravi --- docs/design/cpu-specific-build-macros.rst | 4 ++++ lib/cpus/aarch64/neoverse_n2.S | 7 +++++++ lib/cpus/cpu-ops.mk | 6 +++++- services/std_svc/errata_abi/errata_abi_main.c | 17 +++++++++-------- 4 files changed, 25 insertions(+), 9 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 0b0184076..95497862f 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -655,6 +655,10 @@ For Neoverse N2, the following errata build flags are defined : CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in r0p1. +- ``ERRATA_N2_2340933``: This applies errata 2340933 workaround to Neoverse-N2 + CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in + r0p1. + - ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, it is fixed in r0p3. diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index f80115177..477522fed 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -165,6 +165,13 @@ workaround_runtime_end neoverse_n2, ERRATUM(2326639) check_erratum_ls neoverse_n2, ERRATUM(2326639), CPU_REV(0, 0) +workaround_runtime_start neoverse_n2, ERRATUM(2340933), ERRATA_N2_2340933 + /* Set bit 61 in CPUACTLR5_EL1 */ + sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, BIT(61) +workaround_runtime_end neoverse_n2, ERRATUM(2340933) + +check_erratum_ls neoverse_n2, ERRATUM(2340933), CPU_REV(0, 0) + workaround_runtime_start neoverse_n2, ERRATUM(2346952), ERRATA_N2_2346952 /* Set TXREQ to STATIC and full L2 TQ size */ mrs x1, NEOVERSE_N2_CPUECTLR2_EL1 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 92c6aa491..39e90cae5 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -656,10 +656,14 @@ CPU_FLAG_LIST += ERRATA_N2_2242400 # to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2280757 -# Flag to apply erraturm 2326639 workaroud during powerdown. This erratum +# Flag to apply erratum 2326639 workaroud during powerdown. This erratum # applies to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2326639 +# Flag to apply erratum 2340933 workaroud during reset. This erratum +# applies to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. +CPU_FLAG_LIST += ERRATA_N2_2340933 + # Flag to apply erratum 2346952 workaround during reset. This erratum applies # to r0p0, r0p1, r0p2 of the Neoverse N2 cpu, it is fixed in r0p3. CPU_FLAG_LIST += ERRATA_N2_2346952 diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index 06c38721f..f2ca0d135 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -350,15 +350,16 @@ struct em_cpu_list cpu_list[] = { [9] = {2242415, 0x00, 0x00, ERRATA_N2_2242415}, [10] = {2280757, 0x00, 0x00, ERRATA_N2_2280757}, [11] = {2326639, 0x00, 0x00, ERRATA_N2_2326639}, - [12] = {2346952, 0x00, 0x02, ERRATA_N2_2346952}, - [13] = {2376738, 0x00, 0x00, ERRATA_N2_2376738}, - [14] = {2388450, 0x00, 0x00, ERRATA_N2_2388450}, - [15] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \ + [12] = {2340933, 0x00, 0x00, ERRATA_N2_2340933}, + [13] = {2346952, 0x00, 0x02, ERRATA_N2_2346952}, + [14] = {2376738, 0x00, 0x00, ERRATA_N2_2376738}, + [15] = {2388450, 0x00, 0x00, ERRATA_N2_2388450}, + [16] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \ ERRATA_NON_ARM_INTERCONNECT}, - [16] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, - [17] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, - [18] = {2779511, 0x00, 0x02, ERRATA_N2_2779511}, - [19 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [17] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, + [18] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, + [19] = {2779511, 0x00, 0x02, ERRATA_N2_2779511}, + [20 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* NEOVERSE_N2_H_INC */ From d7bc2cb4303088873a715bcaa2ac3e0096b9d7f2 Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Tue, 17 Oct 2023 07:55:55 -0500 Subject: [PATCH 3/4] fix(cpus): workaround for Cortex-A710 erratum 2742423 Cortex-A710 erratum 2742423 is a Cat B erratum that applies to all revisions <= r2p1 and is still open. The workaround is to set CPUACTLR5_EL1[56:55] to 2'b01. SDEN documentation: https://developer.arm.com/documentation/SDEN-1775101/latest Change-Id: I4d9d3760491f1e6c59b2667c16d59b99cc7979f1 Signed-off-by: Bipin Ravi --- docs/design/cpu-specific-build-macros.rst | 4 ++++ lib/cpus/aarch64/cortex_a710.S | 8 ++++++++ lib/cpus/cpu-ops.mk | 5 +++++ services/std_svc/errata_abi/errata_abi_main.c | 5 +++-- 4 files changed, 20 insertions(+), 2 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 95497862f..11e799246 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -612,6 +612,10 @@ For Cortex-A710, the following errata build flags are defined : interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and is still open. +- ``ERRATA_A710_2742423``: This applies errata 2742423 workaround to + Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and + r2p1 of the CPU and is still open. + - ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the CPU and is still open. diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S index c618d986e..f3931d743 100644 --- a/lib/cpus/aarch64/cortex_a710.S +++ b/lib/cpus/aarch64/cortex_a710.S @@ -178,6 +178,14 @@ workaround_reset_end cortex_a710, ERRATUM(2371105) check_erratum_ls cortex_a710, ERRATUM(2371105), CPU_REV(2, 0) +workaround_reset_start cortex_a710, ERRATUM(2742423), ERRATA_A710_2742423 + /* Set CPUACTLR5_EL1[56:55] to 2'b01 */ + sysreg_bit_set CORTEX_A710_CPUACTLR5_EL1, BIT(55) + sysreg_bit_clear CORTEX_A710_CPUACTLR5_EL1, BIT(56) +workaround_reset_end cortex_a710, ERRATUM(2742423) + +check_erratum_ls cortex_a710, ERRATUM(2742423), CPU_REV(2, 1) + workaround_runtime_start cortex_a710, ERRATUM(2768515), ERRATA_A710_2768515 /* dsb before isb of power down sequence */ dsb sy diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 39e90cae5..8b167a8e8 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -607,6 +607,11 @@ CPU_FLAG_LIST += ERRATA_A710_2371105 # and is still open. CPU_FLAG_LIST += ERRATA_A710_2701952 +# Flag to apply erratum 2742423 workaround during reset. This erratum applies +# to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-A710 cpu and is still +# open. +CPU_FLAG_LIST += ERRATA_A710_2742423 + # Flag to apply erratum 2768515 workaround during power down. This erratum # applies to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-A710 cpu and is # still open. diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index f2ca0d135..108b8ff69 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -328,8 +328,9 @@ struct em_cpu_list cpu_list[] = { [13] = {2371105, 0x00, 0x20, ERRATA_A710_2371105}, [14] = {2701952, 0x00, 0x21, ERRATA_A710_2701952, \ ERRATA_NON_ARM_INTERCONNECT}, - [15] = {2768515, 0x00, 0x21, ERRATA_A710_2768515}, - [16 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [15] = {2742423, 0x00, 0x21, ERRATA_A710_2742423}, + [16] = {2768515, 0x00, 0x21, ERRATA_A710_2768515}, + [17 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* CORTEX_A710_H_INC */ From fe06e118ab0837ff173f6b7e576dcc34b2d26bb1 Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Tue, 17 Oct 2023 09:11:19 -0500 Subject: [PATCH 4/4] fix(cpus): workaround for Cortex-X2 erratum 2742423 Cortex-X2 erratum 2742423 is a Cat B erratum that applies to all revisions <= r2p1 and is still open. The workaround is to set CPUACTLR5_EL1[56:55] to 2'b01. SDEN documentation: https://developer.arm.com/documentation/SDEN-1775100/latest Change-Id: I03897dc2a7f908937612c2b66ce7a043c1b7575d Signed-off-by: Bipin Ravi --- docs/design/cpu-specific-build-macros.rst | 4 ++++ lib/cpus/aarch64/cortex_x2.S | 8 ++++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/errata_abi_main.c | 5 +++-- 4 files changed, 19 insertions(+), 2 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 11e799246..d03daf89f 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -733,6 +733,10 @@ For Cortex-X2, the following errata build flags are defined : This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is still open. +- ``ERRATA_X2_2742423``: This applies errata 2742423 workaround to Cortex-X2 + CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the + CPU and is still open. + - ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the CPU and is still open. diff --git a/lib/cpus/aarch64/cortex_x2.S b/lib/cpus/aarch64/cortex_x2.S index 855d196c4..258288c65 100644 --- a/lib/cpus/aarch64/cortex_x2.S +++ b/lib/cpus/aarch64/cortex_x2.S @@ -118,6 +118,14 @@ workaround_reset_end cortex_x2, ERRATUM(2371105) check_erratum_ls cortex_x2, ERRATUM(2371105), CPU_REV(2, 0) +workaround_reset_start cortex_x2, ERRATUM(2742423), ERRATA_X2_2742423 + /* Set CPUACTLR5_EL1[56:55] to 2'b01 */ + sysreg_bit_set CORTEX_X2_CPUACTLR5_EL1, BIT(55) + sysreg_bit_clear CORTEX_X2_CPUACTLR5_EL1, BIT(56) +workaround_reset_end cortex_x2, ERRATUM(2742423) + +check_erratum_ls cortex_x2, ERRATUM(2742423), CPU_REV(2, 1) + workaround_reset_start cortex_x2, ERRATUM(2768515), ERRATA_X2_2768515 /* dsb before isb of power down sequence */ dsb sy diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 8b167a8e8..434ee081c 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -743,6 +743,10 @@ CPU_FLAG_LIST += ERRATA_X2_2371105 # and is still open. CPU_FLAG_LIST += ERRATA_X2_2701952 +# Flag to apply erratum 2742423 workaround during reset. This erratum applies +# to revisions r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is still open. +CPU_FLAG_LIST += ERRATA_X2_2742423 + # Flag to apply erratum 2768515 workaround during power down. This erratum # applies to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is # still open. diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index 108b8ff69..0b263e5f1 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -380,8 +380,9 @@ struct em_cpu_list cpu_list[] = { [8] = {2371105, 0x00, 0x20, ERRATA_X2_2371105}, [9] = {2701952, 0x00, 0x21, ERRATA_X2_2701952, \ ERRATA_NON_ARM_INTERCONNECT}, - [10] = {2768515, 0x00, 0x21, ERRATA_X2_2768515}, - [11 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [10] = {2742423, 0x00, 0x21, ERRATA_X2_2742423}, + [11] = {2768515, 0x00, 0x21, ERRATA_X2_2768515}, + [12 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* CORTEX_X2_H_INC */