mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes from topic "gr/build_refactor" into integration
* changes: build(refactor): avoid ifdef comparison refactor(build): avoid using values for comparison refactor(build): reorder arch features handling build(n1sdp): add ARM_ARCH_MAJOR.ARM_ARCH_MINOR refactor(build): reorder platform Makefile evaluation
This commit is contained in:
Manish Pandey
TrustedFirmware Code Review
commit
11336fb44d
4 changed files with 217 additions and 107 deletions
119
Makefile
119
Makefile
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@ -447,6 +447,96 @@ INCLUDES += -Iinclude \
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include common/backtrace/backtrace.mk
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################################################################################
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# Generic definitions
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################################################################################
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include ${MAKE_HELPERS_DIRECTORY}plat_helpers.mk
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ifeq (${BUILD_BASE},)
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BUILD_BASE := ./build
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endif
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BUILD_PLAT := $(abspath ${BUILD_BASE})/${PLAT}/${BUILD_TYPE}
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SPDS := $(sort $(filter-out none, $(patsubst services/spd/%,%,$(wildcard services/spd/*))))
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# Platforms providing their own TBB makefile may override this value
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INCLUDE_TBBR_MK := 1
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################################################################################
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# Include SPD Makefile if one has been specified
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################################################################################
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ifneq (${SPD},none)
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ifeq (${ARCH},aarch32)
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$(error "Error: SPD is incompatible with AArch32.")
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endif
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ifdef EL3_PAYLOAD_BASE
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$(warning "SPD and EL3_PAYLOAD_BASE are incompatible build options.")
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$(warning "The SPD and its BL32 companion will be present but \
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ignored.")
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endif
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ifeq (${SPD},spmd)
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# SPMD is located in std_svc directory
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SPD_DIR := std_svc
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ifeq ($(SPMD_SPM_AT_SEL2),1)
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CTX_INCLUDE_EL2_REGS := 1
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ifeq ($(SPMC_AT_EL3),1)
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$(error SPM cannot be enabled in both S-EL2 and EL3.)
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endif
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endif
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ifeq ($(findstring optee_sp,$(ARM_SPMC_MANIFEST_DTS)),optee_sp)
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DTC_CPPFLAGS += -DOPTEE_SP_FW_CONFIG
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endif
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ifeq ($(TS_SP_FW_CONFIG),1)
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DTC_CPPFLAGS += -DTS_SP_FW_CONFIG
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endif
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ifneq ($(ARM_BL2_SP_LIST_DTS),)
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DTC_CPPFLAGS += -DARM_BL2_SP_LIST_DTS=$(ARM_BL2_SP_LIST_DTS)
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endif
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ifneq ($(SP_LAYOUT_FILE),)
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BL2_ENABLE_SP_LOAD := 1
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endif
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else
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# All other SPDs in spd directory
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SPD_DIR := spd
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endif #(SPD)
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# We expect to locate an spd.mk under the specified SPD directory
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SPD_MAKE := $(wildcard services/${SPD_DIR}/${SPD}/${SPD}.mk)
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ifeq (${SPD_MAKE},)
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$(error Error: No services/${SPD_DIR}/${SPD}/${SPD}.mk located)
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endif
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$(info Including ${SPD_MAKE})
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include ${SPD_MAKE}
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# If there's BL32 companion for the chosen SPD, we expect that the SPD's
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# Makefile would set NEED_BL32 to "yes". In this case, the build system
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# supports two mutually exclusive options:
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# * BL32 is built from source: then BL32_SOURCES must contain the list
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# of source files to build BL32
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# * BL32 is a prebuilt binary: then BL32 must point to the image file
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# that will be included in the FIP
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# If both BL32_SOURCES and BL32 are defined, the binary takes precedence
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# over the sources.
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endif #(SPD=none)
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ifeq (${ENABLE_SPMD_LP}, 1)
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ifneq (${SPD},spmd)
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$(error Error: ENABLE_SPMD_LP requires SPD=spmd.)
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endif
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ifeq ($(SPMC_AT_EL3),1)
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$(error SPMC at EL3 not supported when enabling SPMD Logical partitions.)
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endif
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endif
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################################################################################
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# Process BRANCH_PROTECTION value and set
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# Pointer Authentication and Branch Target Identification flags
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@ -491,6 +581,18 @@ ifeq (${ENABLE_PAUTH}, 1)
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BL_COMMON_SOURCES += lib/extensions/pauth/pauth_helpers.S
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endif
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################################################################################
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# Include the platform specific Makefile after the SPD Makefile (the platform
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# makefile may use all previous definitions in this file)
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################################################################################
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include ${PLAT_MAKEFILE_FULL}
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################################################################################
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# Setup arch_features based on ARM_ARCH_MAJOR, ARM_ARCH_MINOR provided from
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# platform.
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################################################################################
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include ${MAKE_HELPERS_DIRECTORY}arch_features.mk
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####################################################
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# Enable required options for Memory Stack Tagging.
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####################################################
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@ -521,6 +623,9 @@ endif #(SUPPORT_STACK_MEMTAG)
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################################################################################
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# FEAT_RME
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ifeq (${ENABLE_RME},1)
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# RME doesn't support BRBE
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ENABLE_BRBE_FOR_NS := 0
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# RME doesn't support PIE
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ifneq (${ENABLE_PIE},0)
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$(error ENABLE_RME does not support PIE)
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@ -670,12 +775,14 @@ include services/std_svc/rmmd/rmmd.mk
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$(warning "RME is an experimental feature")
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endif
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################################################################################
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# Include the platform specific Makefile after the SPD Makefile (the platform
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# makefile may use all previous definitions in this file)
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################################################################################
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include ${PLAT_MAKEFILE_FULL}
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ifeq (${CTX_INCLUDE_EL2_REGS}, 1)
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ifeq (${SPD},none)
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ifeq (${ENABLE_RME},0)
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$(error CTX_INCLUDE_EL2_REGS is available only when SPD \
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or RME is enabled)
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endif
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endif
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endif
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################################################################################
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# Platform specific Makefile might provide us ARCH_MAJOR/MINOR use that to come
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@ -8,100 +8,10 @@
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# and enables them based on the configured architecture version.
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# This file follows the following format:
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# - By default disable any mandatory features.
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# - Then Enable mandatory feature if applicable to an Arch Version.
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# - Enable mandatory feature if applicable to an Arch Version.
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# - By default disable any mandatory features if they have not been defined yet.
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# - Disable or enable any optional feature this would be enabled/disabled if needed by platform.
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#
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################################################################################
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# Set mandatory features by default to zero.
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################################################################################
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#
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#----
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# 8.1
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#----
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# Flag to enable access to Privileged Access Never bit of PSTATE.
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ENABLE_FEAT_PAN := 0
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# Flag to enable Virtualization Host Extensions.
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ENABLE_FEAT_VHE := 0
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#----
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# 8.2
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#----
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# Enable RAS Support.
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ENABLE_FEAT_RAS := 0
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#----
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# 8.3
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#----
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# Flag to enable Pointer Authentication. Internal flag not meant for
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# direct setting. Use BRANCH_PROTECTION to enable PAUTH.
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ENABLE_PAUTH := 0
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# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This
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# must be set to 1 if the platform wants to use this feature in the Secure
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# world. It is not necessary for use in the Non-secure world.
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CTX_INCLUDE_PAUTH_REGS := 0
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#----
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# 8.4
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#----
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# Flag to enable Secure EL-2 feature.
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ENABLE_FEAT_SEL2 := 0
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# By default, disable trace filter control register access to lower non-secure
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# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but
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# trace filter control register access is unused if FEAT_TRF is implemented.
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ENABLE_TRF_FOR_NS := 0
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# Flag to enable Data Independent Timing instructions.
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ENABLE_FEAT_DIT := 0
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#----
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# 8.5
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#----
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# Flag to enable access to the Random Number Generator registers.
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ENABLE_FEAT_RNG := 0
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# Flag to enable Speculation Barrier Instruction.
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ENABLE_FEAT_SB := 0
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# Flag to enable Branch Target Identification.
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# Internal flag not meant for direct setting.
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# Use BRANCH_PROTECTION to enable BTI.
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ENABLE_BTI := 0
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#----
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# 8.6
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#----
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# Flag to enable access to the CNTPOFF_EL2 register.
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ENABLE_FEAT_ECV := 0
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# Flag to enable access to the HDFGRTR_EL2 register.
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ENABLE_FEAT_FGT := 0
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#----
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# 8.7
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#----
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# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn.
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ENABLE_FEAT_HCX := 0
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#----
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# 8.9
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#----
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# Flag to enable access to TCR2 (FEAT_TCR2).
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ENABLE_FEAT_TCR2 := 0
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#
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################################################################################
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# Enable Mandatory features based on Arch versions.
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@ -154,6 +64,97 @@ ifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))"
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ENABLE_FEAT_TCR2 := 1
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endif
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#
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################################################################################
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# Set mandatory features by default to zero.
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################################################################################
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#
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#----
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# 8.1
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#----
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# Flag to enable access to Privileged Access Never bit of PSTATE.
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ENABLE_FEAT_PAN ?= 0
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# Flag to enable Virtualization Host Extensions.
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ENABLE_FEAT_VHE ?= 0
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#----
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# 8.2
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#----
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# Enable RAS Support.
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ENABLE_FEAT_RAS ?= 0
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#----
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# 8.3
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#----
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# Flag to enable Pointer Authentication. Internal flag not meant for
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# direct setting. Use BRANCH_PROTECTION to enable PAUTH.
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ENABLE_PAUTH ?= 0
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# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This
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# must be set to 1 if the platform wants to use this feature in the Secure
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# world. It is not necessary for use in the Non-secure world.
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CTX_INCLUDE_PAUTH_REGS ?= 0
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#----
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# 8.4
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#----
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# Flag to enable Secure EL-2 feature.
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ENABLE_FEAT_SEL2 ?= 0
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# By default, disable trace filter control register access to lower non-secure
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# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but
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# trace filter control register access is unused if FEAT_TRF is implemented.
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ENABLE_TRF_FOR_NS ?= 0
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# Flag to enable Data Independent Timing instructions.
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ENABLE_FEAT_DIT ?= 0
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#----
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# 8.5
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#----
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# Flag to enable Branch Target Identification.
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# Internal flag not meant for direct setting.
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# Use BRANCH_PROTECTION to enable BTI.
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ENABLE_BTI ?= 0
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# Flag to enable access to the Random Number Generator registers.
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ENABLE_FEAT_RNG ?= 0
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# Flag to enable Speculation Barrier Instruction.
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ENABLE_FEAT_SB ?= 0
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#----
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# 8.6
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#----
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# Flag to enable access to the CNTPOFF_EL2 register.
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ENABLE_FEAT_ECV ?= 0
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# Flag to enable access to the HDFGRTR_EL2 register.
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ENABLE_FEAT_FGT ?= 0
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#----
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# 8.7
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#----
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# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn.
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ENABLE_FEAT_HCX ?= 0
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#----
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# 8.9
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#----
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# Flag to enable access to TCR2 (FEAT_TCR2).
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ENABLE_FEAT_TCR2 ?= 0
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#
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################################################################################
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# Optional Features defaulted to 0 or 2, if they are not enabled from
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@ -184,7 +185,7 @@ ENABLE_SYS_REG_TRACE_FOR_NS ?= 0
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ifeq (${ARCH},aarch64)
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ENABLE_SPE_FOR_NS ?= 2
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else ifeq (${ARCH},aarch32)
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ifdef ENABLE_SPE_FOR_NS
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ifneq ($(or $(ENABLE_SPE_FOR_NS),0),0)
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$(error ENABLE_SPE_FOR_NS is not supported for AArch32)
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else
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ENABLE_SPE_FOR_NS := 0
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@ -196,7 +197,7 @@ ifeq (${ARCH},aarch64)
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ENABLE_SVE_FOR_NS ?= 2
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# SVE is only supported on AArch64 so disable it on AArch32.
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else ifeq (${ARCH},aarch32)
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ifdef ENABLE_SVE_FOR_NS
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ifneq ($(or $(ENABLE_SVE_FOR_NS),0),0)
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$(error ENABLE_SVE_FOR_NS is not supported for AArch32)
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else
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ENABLE_SVE_FOR_NS := 0
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@ -302,10 +303,10 @@ ENABLE_SVE_FOR_SWD ?= 0
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ifeq (${ARCH},aarch64)
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ENABLE_TRBE_FOR_NS ?= 0
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else ifeq (${ARCH},aarch32)
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ifdef ENABLE_TRBE_FOR_NS
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$(error ENABLE_TRBE_FOR_NS is not supported for AArch32)
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ifneq ($(or $(ENABLE_TRBE_FOR_NS),0),0)
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$(error ENABLE_TRBE_FOR_NS is not supported for AArch32)
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else
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ENABLE_TRBE_FOR_NS := 0
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ENABLE_TRBE_FOR_NS := 0
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endif
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endif
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@ -72,9 +72,7 @@ endif
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# enable unconditionally for all builds
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ifeq (${ARCH}, aarch64)
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ifeq (${ENABLE_RME},0)
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ENABLE_BRBE_FOR_NS := 2
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endif
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ENABLE_BRBE_FOR_NS := 2
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ENABLE_TRBE_FOR_NS := 2
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endif
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ENABLE_SYS_REG_TRACE_FOR_NS := 2
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2018-2022, Arm Limited. All rights reserved.
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# Copyright (c) 2018-2023, Arm Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -14,6 +14,10 @@ PLAT_INCLUDES := -I${N1SDP_BASE}/include
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N1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
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# Neoverse N1 cores support Armv8.2 extensions
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ARM_ARCH_MAJOR := 8
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ARM_ARCH_MINOR := 2
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# GIC-600 configuration
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GICV3_SUPPORT_GIC600 := 1
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GICV3_IMPL_GIC600_MULTICHIP := 1
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