fix(imx): disable DRAM retention by default on i.MX8MQ

Building the default upstream configuration for the imx8mq-evk is no longer
possible: The linker will complain that the TF-A image will no longer
fit On-Chip SRAM.

In order to make the i.MX8MQ Image buildable again, let's make the DRAM
retention feature optional: It was added in v2.9 and it's possible to
boot the systems without it. Users that make space elsewhere and wish to
enable it can use the newly introduced IMX_DRAM_RETENTION parameter to
configure it. The parameter is added to all i.MX8M variants, but only
for i.MX8MQ, we disable it by default, as that's the one that currently
has binary size problems.

Change-Id: I714f8ea96f18154db02390ba500f4a2dc5329ee7
Fixes: dd108c3c1f ("feat(imx8mq): add the dram retention support for imx8mq")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
This commit is contained in:
Ahmad Fatoum 2024-03-13 08:08:13 +01:00
parent dafa718bc9
commit 108146ce73
6 changed files with 47 additions and 5 deletions

View file

@ -62,8 +62,16 @@ int imx_soc_info_handler(uint32_t smc_fid, u_register_t x1,
u_register_t x2, u_register_t x3); u_register_t x2, u_register_t x3);
int imx_gpc_handler(uint32_t smc_fid, u_register_t x1, int imx_gpc_handler(uint32_t smc_fid, u_register_t x1,
u_register_t x2, u_register_t x3); u_register_t x2, u_register_t x3);
#if IMX_DRAM_RETENTION
int dram_dvfs_handler(uint32_t smc_fid, void *handle, int dram_dvfs_handler(uint32_t smc_fid, void *handle,
u_register_t x1, u_register_t x2, u_register_t x3); u_register_t x1, u_register_t x2, u_register_t x3);
#else
static inline int dram_dvfs_handler(uint32_t smc_fid, void *handle,
u_register_t x1, u_register_t x2, u_register_t x3)
{
SMC_RET1(handle, SMC_UNK);
}
#endif
#endif #endif
#if defined(PLAT_imx8mm) || defined(PLAT_imx8mn) || defined(PLAT_imx8mp) #if defined(PLAT_imx8mm) || defined(PLAT_imx8mn) || defined(PLAT_imx8mp)
int dram_dvfs_handler(uint32_t smc_fid, void *handle, int dram_dvfs_handler(uint32_t smc_fid, void *handle,

View file

@ -54,7 +54,6 @@ BL31_SOURCES += common/desc_image_load.c \
drivers/delay_timer/delay_timer.c \ drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \
${XLAT_TABLES_LIB_SRCS} \ ${XLAT_TABLES_LIB_SRCS} \
${IMX_DRAM_SOURCES} \
${IMX_GIC_SOURCES} ${IMX_GIC_SOURCES}
ifeq (${NEED_BL2},yes) ifeq (${NEED_BL2},yes)
@ -155,6 +154,14 @@ ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1 ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1 ERRATA_A53_855873 := 1
IMX_DRAM_RETENTION ?= 1
$(eval $(call assert_boolean,IMX_DRAM_RETENTION))
$(eval $(call add_define,IMX_DRAM_RETENTION))
ifeq (${IMX_DRAM_RETENTION},1)
BL31_SOURCES += ${IMX_DRAM_SOURCES}
endif
ifneq (${PRELOADED_BL33_BASE},) ifneq (${PRELOADED_BL33_BASE},)
$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE})) $(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
endif endif

View file

@ -48,7 +48,6 @@ BL31_SOURCES += common/desc_image_load.c \
drivers/arm/tzc/tzc380.c \ drivers/arm/tzc/tzc380.c \
drivers/delay_timer/delay_timer.c \ drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \
${IMX_DRAM_SOURCES} \
${IMX_GIC_SOURCES} \ ${IMX_GIC_SOURCES} \
${XLAT_TABLES_LIB_SRCS} ${XLAT_TABLES_LIB_SRCS}
@ -61,6 +60,14 @@ ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1 ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1 ERRATA_A53_855873 := 1
IMX_DRAM_RETENTION ?= 1
$(eval $(call assert_boolean,IMX_DRAM_RETENTION))
$(eval $(call add_define,IMX_DRAM_RETENTION))
ifeq (${IMX_DRAM_RETENTION},1)
BL31_SOURCES += ${IMX_DRAM_SOURCES}
endif
ifneq (${PRELOADED_BL33_BASE},) ifneq (${PRELOADED_BL33_BASE},)
$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE})) $(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
endif endif

View file

@ -49,7 +49,6 @@ BL31_SOURCES += common/desc_image_load.c \
drivers/arm/tzc/tzc380.c \ drivers/arm/tzc/tzc380.c \
drivers/delay_timer/delay_timer.c \ drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \
${IMX_DRAM_SOURCES} \
${IMX_GIC_SOURCES} \ ${IMX_GIC_SOURCES} \
${XLAT_TABLES_LIB_SRCS} ${XLAT_TABLES_LIB_SRCS}
@ -152,6 +151,14 @@ ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1 ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1 ERRATA_A53_855873 := 1
IMX_DRAM_RETENTION ?= 1
$(eval $(call assert_boolean,IMX_DRAM_RETENTION))
$(eval $(call add_define,IMX_DRAM_RETENTION))
ifeq (${IMX_DRAM_RETENTION},1)
BL31_SOURCES += ${IMX_DRAM_SOURCES}
endif
ifneq (${PRELOADED_BL33_BASE},) ifneq (${PRELOADED_BL33_BASE},)
$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE})) $(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
endif endif

View file

@ -43,7 +43,6 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \
drivers/delay_timer/delay_timer.c \ drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \
${XLAT_TABLES_LIB_SRCS} \ ${XLAT_TABLES_LIB_SRCS} \
${IMX_DRAM_SOURCES} \
${IMX_GIC_SOURCES} ${IMX_GIC_SOURCES}
ENABLE_PIE := 1 ENABLE_PIE := 1
@ -56,6 +55,14 @@ ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1 ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1 ERRATA_A53_855873 := 1
IMX_DRAM_RETENTION ?= 0
$(eval $(call assert_boolean,IMX_DRAM_RETENTION))
$(eval $(call add_define,IMX_DRAM_RETENTION))
ifeq (${IMX_DRAM_RETENTION},1)
BL31_SOURCES += ${IMX_DRAM_SOURCES}
endif
ifneq (${PRELOADED_BL33_BASE},) ifneq (${PRELOADED_BL33_BASE},)
$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE})) $(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
endif endif

View file

@ -70,13 +70,19 @@ struct dram_info {
extern struct dram_info dram_info; extern struct dram_info dram_info;
void dram_info_init(unsigned long dram_timing_base);
void dram_umctl2_init(struct dram_timing_info *timing); void dram_umctl2_init(struct dram_timing_info *timing);
void dram_phy_init(struct dram_timing_info *timing); void dram_phy_init(struct dram_timing_info *timing);
/* dram retention */ /* dram retention */
#if IMX_DRAM_RETENTION
void dram_info_init(unsigned long dram_timing_base);
void dram_enter_retention(void); void dram_enter_retention(void);
void dram_exit_retention(void); void dram_exit_retention(void);
#else
static inline void dram_info_init(unsigned long dram_timing_base) {}
static inline void dram_enter_retention(void) {}
static inline void dram_exit_retention(void) {}
#endif
void dram_clock_switch(unsigned int target_drate, bool bypass_mode); void dram_clock_switch(unsigned int target_drate, bool bypass_mode);