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Merge changes from topic "ehf_common" into integration

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* changes:
  plat: tegra: Use generic ehf defines
  ehf: use common priority level enumuration
This commit is contained in:
Manish Pandey 2020-09-18 14:20:02 +00:00 • committed by TrustedFirmware Code Review
commit 101daafd6b
7 changed files with 45 additions and 64 deletions
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2
include/plat/arm/common/arm_def.h
View file

@ -568,7 +568,7 @@
#define PLAT_SDEI_NORMAL_PRI 0x70
/* ARM platforms use 3 upper bits of secure interrupt priority */
#define ARM_PRI_BITS 3
#define PLAT_PRI_BITS 3
/* SGI used for SDEI signalling */
#define ARM_SDEI_SGI ARM_IRQ_SEC_SGI_0

33
plat/arm/common/aarch64/arm_ehf.c
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@ -1,33 +0,0 @@
/*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <platform_def.h>
#include <bl31/ehf.h>
/*
* Enumeration of priority levels on ARM platforms.
*/
ehf_pri_desc_t arm_exceptions[] = {
#if RAS_EXTENSION
/* RAS Priority */
EHF_PRI_DESC(ARM_PRI_BITS, PLAT_RAS_PRI),
#endif
#if SDEI_SUPPORT
/* Critical priority SDEI */
EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SDEI_CRITICAL_PRI),
/* Normal priority SDEI */
EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
#endif
#if SPM_MM
EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SP_PRI),
#endif
};
/* Plug in ARM exceptions to Exception Handling Framework. */
EHF_REGISTER_PRIORITIES(arm_exceptions, ARRAY_SIZE(arm_exceptions), ARM_PRI_BITS);

2
plat/arm/common/arm_common.mk
View file

@ -258,7 +258,7 @@ endif
endif
ifeq (${EL3_EXCEPTION_HANDLING},1)
BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c
BL31_SOURCES += plat/common/aarch64/plat_ehf.c
endif
ifeq (${SDEI_SUPPORT},1)

37
plat/common/aarch64/plat_ehf.c Normal file
View file

@ -0,0 +1,37 @@
/*
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, Broadcom
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <bl31/ehf.h>
#include <platform_def.h>
/*
* Enumeration of priority levels on ARM platforms.
*/
ehf_pri_desc_t plat_exceptions[] = {
#if RAS_EXTENSION
/* RAS Priority */
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_RAS_PRI),
#endif
#if SDEI_SUPPORT
/* Critical priority SDEI */
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_CRITICAL_PRI),
/* Normal priority SDEI */
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
#endif
#if SPM_MM
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SP_PRI),
#endif
/* Plaform specific exceptions description */
#ifdef PLAT_EHF_DESC
PLAT_EHF_DESC,
#endif
};
/* Plug in ARM exceptions to Exception Handling Framework. */
EHF_REGISTER_PRIORITIES(plat_exceptions, ARRAY_SIZE(plat_exceptions), PLAT_PRI_BITS);

4
plat/nvidia/tegra/common/tegra_common.mk
View file

@ -44,7 +44,6 @@ BL31_SOURCES += drivers/delay_timer/delay_timer.c \
${TEGRA_LIBS}/debug/profiler.c \
${TEGRA_COMMON}/tegra_bl31_setup.c \
${TEGRA_COMMON}/tegra_delay_timer.c \
${TEGRA_COMMON}/tegra_ehf.c \
${TEGRA_COMMON}/tegra_fiq_glue.c \
${TEGRA_COMMON}/tegra_io_storage.c \
${TEGRA_COMMON}/tegra_platform.c \
@ -55,3 +54,6 @@ BL31_SOURCES += drivers/delay_timer/delay_timer.c \
ifneq ($(ENABLE_STACK_PROTECTOR), 0)
BL31_SOURCES += ${TEGRA_COMMON}/tegra_stack_protector.c
endif
ifeq (${EL3_EXCEPTION_HANDLING},1)
BL31_SOURCES += plat/common/aarch64/plat_ehf.c
endif

28
plat/nvidia/tegra/common/tegra_ehf.c
View file

@ -1,28 +0,0 @@
/*
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <platform_def.h>
#include <bl31/ehf.h>
/*
* Enumeration of priority levels on Tegra platforms.
*/
ehf_pri_desc_t tegra_exceptions[] = {
/* Watchdog priority */
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_TEGRA_WDT_PRIO),
#if SDEI_SUPPORT
/* Critical priority SDEI */
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_CRITICAL_PRI),
/* Normal priority SDEI */
EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
#endif
};
/* Plug in Tegra exceptions to Exception Handling Framework. */
EHF_REGISTER_PRIORITIES(tegra_exceptions, ARRAY_SIZE(tegra_exceptions), PLAT_PRI_BITS);

3
plat/nvidia/tegra/include/platform_def.h
View file

@ -99,6 +99,9 @@
#define PLAT_SDEI_NORMAL_PRI U(0x30)
#define PLAT_TEGRA_WDT_PRIO U(0x40)
#define PLAT_EHF_DESC EHF_PRI_DESC(PLAT_PRI_BITS,\
PLAT_TEGRA_WDT_PRIO)
/*******************************************************************************
* SDEI events
******************************************************************************/