refactor(cm): make SVE and SME build dependencies logical

Currently, enabling SME forces SVE off. However, the SME enablement
requires SVE to be enabled, which is reflected in code. This is the
opposite of what the build flags require.

Further, the few platforms that enable SME also explicitly enable SVE.
Their platform.mk runs after the defaults.mk file so this override never
materializes. As a result, the override is only present on the
commandline.

Change it to something sensible where if SME is on then code can rely on
SVE being on too. Do this with a check in the Makefile as it is the more
widely used pattern. This maintains all valid use cases but subtly
changes corner cases no one uses at the moment to require a slightly
different combination of flags.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: If7ca3972ebc3c321e554533d7bc81af49c2472be
This commit is contained in:
Boyan Karatotev 2023-03-08 16:29:26 +00:00
parent c194aa0c6c
commit 0d1229473e
6 changed files with 42 additions and 47 deletions

View file

@ -912,11 +912,20 @@ ifeq (${ENABLE_RME},1)
endif
endif
ifneq (${ENABLE_SME_FOR_NS},0)
ifeq (${ENABLE_SVE_FOR_NS},0)
$(error "ENABLE_SME_FOR_NS requires ENABLE_SVE_FOR_NS")
endif
endif
# Secure SME/SVE requires the non-secure component as well
ifeq (${ENABLE_SME_FOR_SWD},1)
ifeq (${ENABLE_SME_FOR_NS},0)
$(error "ENABLE_SME_FOR_SWD requires ENABLE_SME_FOR_NS")
endif
ifeq (${ENABLE_SVE_FOR_SWD},0)
$(error "ENABLE_SME_FOR_SWD requires ENABLE_SVE_FOR_SWD")
endif
endif
ifeq (${ENABLE_SVE_FOR_SWD},1)
ifeq (${ENABLE_SVE_FOR_NS},0)

View file

@ -101,12 +101,10 @@ endif
ifneq (${ENABLE_SME_FOR_NS},0)
BL31_SOURCES += lib/extensions/sme/sme.c
BL31_SOURCES += lib/extensions/sve/sve.c
else
endif
ifneq (${ENABLE_SVE_FOR_NS},0)
BL31_SOURCES += lib/extensions/sve/sve.c
endif
endif
ifneq (${ENABLE_MPAM_FOR_LOWER_ELS},0)
BL31_SOURCES += lib/extensions/mpam/mpam.c

View file

@ -436,7 +436,8 @@ Common build options
(SME), SVE, and FPU/SIMD for the non-secure world only. These features share
registers so are enabled together. Using this option without
ENABLE_SME_FOR_SWD=1 will cause SME, SVE, and FPU/SIMD instructions in secure
world to trap to EL3. SME is an optional architectural feature for AArch64
world to trap to EL3. Requires ``ENABLE_SVE_FOR_NS`` to be set as SME is a
superset of SVE. SME is an optional architectural feature for AArch64
and TF-A support is experimental. At this time, this build option cannot be
used on systems that have SPD=spmd/SPM_MM or ENABLE_RME, and attempting to
build with these options will fail. This flag can take the values 0 to 2, to
@ -450,10 +451,9 @@ Common build options
align with the ``FEATURE_DETECTION`` mechanism. Default is 0.
- ``ENABLE_SME_FOR_SWD``: Boolean option to enable the Scalable Matrix
Extension for secure world use along with SVE and FPU/SIMD, ENABLE_SME_FOR_NS
must also be set to use this. If enabling this, the secure world MUST
handle context switching for SME, SVE, and FPU/SIMD registers to ensure that
no data is leaked to non-secure world. This is experimental. Default is 0.
Extension for secure world. Used along with SVE and FPU/SIMD.
ENABLE_SME_FOR_NS and ENABLE_SVE_FOR_SWD must also be set to use this.
This is experimental. Default is 0.
- ``ENABLE_SPE_FOR_NS`` : Numeric value to enable Statistical Profiling
extensions. This is an optional architectural feature for AArch64.
@ -469,17 +469,15 @@ Common build options
This is to avoid corruption of the Non-secure world data in the Z-registers
which are aliased by the SIMD and FP registers. The build option is not
compatible with the ``CTX_INCLUDE_FPREGS`` build option, and will raise an
assert on platforms where SVE is implemented and ``ENABLE_SVE_FOR_NS`` enabled.
This flag can take the values 0 to 2, to align with the ``FEATURE_DETECTION``
mechanism. The default is 2 but is automatically disabled when
ENABLE_SME_FOR_NS is enabled ( set to 1 or 2) since SME encompasses SVE.
At this time, this build option cannot be used on systems that have SPM_MM
enabled.
assert on platforms where SVE is implemented and ``ENABLE_SVE_FOR_NS``
enabled. This flag can take the values 0 to 2, to align with the
``FEATURE_DETECTION`` mechanism. At this time, this build option cannot be
used on systems that have SPM_MM enabled. The default is 1.
- ``ENABLE_SVE_FOR_SWD``: Boolean option to enable SVE for the Secure world.
SVE is an optional architectural feature for AArch64. Note that this option
requires ENABLE_SVE_FOR_NS to be enabled. The default is 0 and it
is automatically disabled when the target architecture is AArch32.
requires ENABLE_SVE_FOR_NS to be enabled. The default is 0 and it is
automatically disabled when the target architecture is AArch32.
- ``ENABLE_STACK_PROTECTOR``: String option to enable the stack protection
checks in GCC. Allowed values are "all", "strong", "default" and "none". The

View file

@ -517,12 +517,13 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx)
amu_enable(el2_unused, ctx);
}
/* Enable SME, SVE, and FPU/SIMD for non-secure world. */
/* Enable SVE and FPU/SIMD */
if (is_feat_sve_supported()) {
sve_enable(ctx);
}
if (is_feat_sme_supported()) {
sme_enable(ctx);
} else if (is_feat_sve_supported()) {
/* Enable SVE and FPU/SIMD for non-secure world. */
sve_enable(ctx);
}
if (is_feat_mpam_supported()) {
@ -553,22 +554,7 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx)
static void manage_extensions_secure(cpu_context_t *ctx)
{
#if IMAGE_BL31
if (is_feat_sme_supported()) {
if (ENABLE_SME_FOR_SWD) {
/*
* Enable SME, SVE, FPU/SIMD in secure context, secure manager
* must ensure SME, SVE, and FPU/SIMD context properly managed.
*/
sme_enable(ctx);
} else {
/*
* Disable SME, SVE, FPU/SIMD in secure context so non-secure
* world can safely use the associated registers.
*/
sme_disable(ctx);
}
} else if (is_feat_sve_supported()) {
if (is_feat_sve_supported()) {
if (ENABLE_SVE_FOR_SWD) {
/*
* Enable SVE and FPU in secure context, secure manager must
@ -585,6 +571,21 @@ static void manage_extensions_secure(cpu_context_t *ctx)
}
}
if (is_feat_sme_supported()) {
if (ENABLE_SME_FOR_SWD) {
/*
* Enable SME, SVE, FPU/SIMD in secure context, secure manager
* must ensure SME, SVE, and FPU/SIMD context properly managed.
*/
sme_enable(ctx);
} else {
/*
* Disable SME, SVE, FPU/SIMD in secure context so non-secure
* world can safely use the associated registers.
*/
sme_disable(ctx);
}
}
#endif /* IMAGE_BL31 */
}

View file

@ -65,9 +65,6 @@ void sme_enable(cpu_context_t *context)
/* Reset CPTR_EL3 value. */
write_cptr_el3(cptr_el3);
isb();
/* Enable SVE/FPU in addition to SME. */
sve_enable(context);
}
void sme_disable(cpu_context_t *context)

View file

@ -401,14 +401,6 @@ SVE_VECTOR_LEN := 2048
# SME defaults to disabled
ENABLE_SME_FOR_NS := 0
ENABLE_SME_FOR_SWD := 0
# If SME is enabled then force SVE off
ifneq (${ENABLE_SME_FOR_NS},0)
override ENABLE_SVE_FOR_NS := 0
override ENABLE_SVE_FOR_SWD := 0
endif
# SME2 defaults to disabled
ENABLE_SME2_FOR_NS := 0
SANITIZE_UB := off