Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-25 14:25:44 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

build(fvp): make all builds unconditional

Browse source 
commit@138221c2457b9d04101b84084c07d576b0eb5a51 reduced items that
should be build due to SRAM size limitations.

But newer models from 11.19 onwards support to set SRAM size greater
than 256KB. So remove all dependency and conditional builds for FVP.

Change-Id: I38684e100450b74fdda0d685775e2cbce92170b6
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
This commit is contained in:
Govindraj Raja 2024-04-24 13:36:11 -05:00
parent 93a7a6d0ea
commit 0bd2075efc
1 changed files with 19 additions and 40 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

59
plat/arm/board/fvp/platform.mk
View file

@ -7,70 +7,50 @@
include common/fdt_wrappers.mk
# Use the GICv3 driver on the FVP by default
FVP_USE_GIC_DRIVER := FVP_GICV3
FVP_USE_GIC_DRIVER := FVP_GICV3
# Default cluster count for FVP
FVP_CLUSTER_COUNT := 2
FVP_CLUSTER_COUNT := 2
# Default number of CPUs per cluster on FVP
FVP_MAX_CPUS_PER_CLUSTER := 4
# Default number of threads per CPU on FVP
FVP_MAX_PE_PER_CPU := 1
FVP_MAX_PE_PER_CPU := 1
# Disable redistributor frame of inactive/fused CPU cores by marking it as read
# only; enable redistributor frames of all CPU cores by default.
FVP_GICR_REGION_PROTECTION := 0
FVP_GICR_REGION_PROTECTION := 0
FVP_DT_PREFIX := fvp-base-gicv3-psci
FVP_DT_PREFIX := fvp-base-gicv3-psci
# Size (in kilobytes) of the Trusted SRAM region to utilize when building for
# the FVP platform. This option defaults to 256.
FVP_TRUSTED_SRAM_SIZE := 256
FVP_TRUSTED_SRAM_SIZE := 256
# Macro to enable helpers for running SPM tests. Disabled by default.
PLAT_TEST_SPM := 0
# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
# progbits limit. We need a way to build all useful configurations while waiting
# on the fvp to increase its SRAM size. The problem is twofild:
# 1. the cleanup that introduced these enables cleaned up tf-a a little too
# well and things that previously (incorrectly) were enabled, no longer are.
# A bunch of CI configs build subtly incorrectly and this combo makes it
# necessary to forcefully and unconditionally enable them here.
# 2. the progbits limit is exceeded only when the tsp is involved. However,
# there are tsp CI configs that run on very high architecture revisions so
# disabling everything isn't an option.
# The fix is to enable everything, as before. When the tsp is included, though,
# we need to slim the size down. In that case, disable all optional features,
# that will not be present in CI when the tsp is.
# Similarly, DRTM support is only tested on v8.0 models. Disable everything just
# for it.
# TODO: make all of this unconditional (or only base the condition on
# ARM_ARCH_* when the makefile supports it).
ifneq (${DRTM_SUPPORT}, 1)
ifneq (${SPD}, tspd)
ENABLE_FEAT_AMU := 2
ENABLE_FEAT_AMUv1p1 := 2
ENABLE_FEAT_HCX := 2
ENABLE_FEAT_RNG := 2
ENABLE_FEAT_TWED := 2
ENABLE_FEAT_GCS := 2
ENABLE_FEAT_AMU := 2
ENABLE_FEAT_AMUv1p1 := 2
ENABLE_FEAT_HCX := 2
ENABLE_FEAT_RNG := 2
ENABLE_FEAT_TWED := 2
ENABLE_FEAT_GCS := 2
ifeq (${ARCH}, aarch64)
ifeq (${SPM_MM}, 0)
ifeq (${CTX_INCLUDE_FPREGS}, 0)
ENABLE_SME_FOR_NS := 2
ENABLE_SME2_FOR_NS := 2
endif
endif
ENABLE_SME_FOR_NS := 2
ENABLE_SME2_FOR_NS := 2
endif
endif
# enable unconditionally for all builds
ifeq (${ARCH}, aarch64)
ENABLE_BRBE_FOR_NS := 2
ENABLE_TRBE_FOR_NS := 2
ENABLE_BRBE_FOR_NS := 2
ENABLE_TRBE_FOR_NS := 2
endif
ENABLE_SYS_REG_TRACE_FOR_NS := 2
ENABLE_FEAT_CSV2_2 := 2
ENABLE_FEAT_CSV2_3 := 2
@ -87,7 +67,6 @@ ENABLE_FEAT_S2PIE := 2
ENABLE_FEAT_S1PIE := 2
ENABLE_FEAT_S2POE := 2
ENABLE_FEAT_S1POE := 2
endif
# The FVP platform depends on this macro to build with correct GIC driver.
$(eval $(call add_define,FVP_USE_GIC_DRIVER))