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revert(cpus): "Revert workaround for A77 erratum 1800714"
Reinstate the workaround introduced in commit
9bbc03a6e0
. The cited change to the SDEN
could not be found and there are no known problems with the workaround.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iec9938f173e7565024aca798f224df339de90806
This commit is contained in:
parent
c19116dd61
commit
08e2fdbd3b
4 changed files with 48 additions and 1 deletions
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@ -273,6 +273,9 @@ For Cortex-A77, the following errata build flags are defined :
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- ``ERRATA_A77_2356587``: This applies errata 2356587 workaround to Cortex-A77
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CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
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- ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77
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CPU. This needs to be enabled for revisions <= r1p1 of the CPU.
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For Cortex-A78, the following errata build flags are defined :
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- ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78
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@ -20,6 +20,7 @@
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******************************************************************************/
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#define CORTEX_A77_CPUECTLR_EL1 S3_0_C15_C1_4
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#define CORTEX_A77_CPUECTLR_EL1_BIT_8 (ULL(1) << 8)
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#define CORTEX_A77_CPUECTLR_EL1_BIT_53 (ULL(1) << 53)
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/*******************************************************************************
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* CPU Power Control register specific definitions.
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@ -236,6 +236,35 @@ func check_errata_cve_2022_23960
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ret
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endfunc check_errata_cve_2022_23960
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/* --------------------------------------------------
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* Errata Workaround for Cortex A77 Errata #1800714.
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* This applies to revision <= r1p1 of Cortex A77.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_a77_1800714_wa
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/* Compare x0 against revision <= r1p1 */
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mov x17, x30
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bl check_errata_1800714
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cbz x0, 1f
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/* Disable allocation of splintered pages in the L2 TLB */
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mrs x1, CORTEX_A77_CPUECTLR_EL1
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orr x1, x1, CORTEX_A77_CPUECTLR_EL1_BIT_53
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msr CORTEX_A77_CPUECTLR_EL1, x1
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isb
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1:
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ret x17
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endfunc errata_a77_1800714_wa
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func check_errata_1800714
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/* Applies to everything <= r1p1 */
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mov x1, #0x11
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b cpu_rev_var_ls
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endfunc check_errata_1800714
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A77.
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* Shall clobber: x0-x19
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@ -280,6 +309,11 @@ func cortex_a77_reset_func
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msr vbar_el3, x0
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#endif /* IMAGE_BL31 && WORKAROUND_CVE_2022_23960 */
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#if ERRATA_A77_1800714
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mov x0, x18
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bl errata_a77_1800714_wa
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#endif
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isb
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ret x19
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endfunc cortex_a77_reset_func
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@ -315,9 +349,10 @@ func cortex_a77_errata_report
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* checking functions of each errata.
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*/
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report_errata ERRATA_A77_1508412, cortex_a77, 1508412
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report_errata ERRATA_A77_1791578, cortex_a77, 1791578
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report_errata ERRATA_A77_1800714, cortex_a77, 1800714
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report_errata ERRATA_A77_1925769, cortex_a77, 1925769
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report_errata ERRATA_A77_1946167, cortex_a77, 1946167
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report_errata ERRATA_A77_1791578, cortex_a77, 1791578
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report_errata ERRATA_A77_2356587, cortex_a77, 2356587
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report_errata WORKAROUND_CVE_2022_23960, cortex_a77, cve_2022_23960
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@ -307,6 +307,10 @@ ERRATA_A77_1791578 ?=0
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# to revisions r0p0, r1p0, and r1p1, it is still open.
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ERRATA_A77_2356587 ?=0
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# Flag to apply erratum 1800714 workaround during reset. This erratum applies
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# to revisions <= r1p1 of the Cortex A77 cpu.
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ERRATA_A77_1800714 ?=0
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# Flag to apply erratum 1688305 workaround during reset. This erratum applies
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# to revisions r0p0 - r1p0 of the A78 cpu.
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ERRATA_A78_1688305 ?=0
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@ -912,6 +916,10 @@ $(eval $(call add_define,ERRATA_A77_1791578))
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$(eval $(call assert_boolean,ERRATA_A77_2356587))
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$(eval $(call add_define,ERRATA_A77_2356587))
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# Process ERRATA_A77_1800714 flag
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$(eval $(call assert_boolean,ERRATA_A77_1800714))
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$(eval $(call add_define,ERRATA_A77_1800714))
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# Process ERRATA_A78_1688305 flag
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$(eval $(call assert_boolean,ERRATA_A78_1688305))
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$(eval $(call add_define,ERRATA_A78_1688305))
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