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Specify BL31 runtime console for ARM Standard platforms
This patch overrides the default weak definition of `bl31_plat_runtime_setup()` for ARM Standard platforms to specify a BL31 runtime console. ARM Standard platforms are now expected to define `PLAT_ARM_BL31_RUN_UART_BASE` and `PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ` macros which is required by `arm_bl31_plat_runtime_setup()` to initialize the runtime console. The system suspend resume helper `arm_system_pwr_domain_resume()` is fixed to initialize the runtime console rather than the boot console on resumption from system suspend. Fixes ARM-software/tf-issues#220 Change-Id: I80eafe5b6adcfc7f1fdf8b99659aca1c64d96975
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6 changed files with 32 additions and 5 deletions
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@ -1182,6 +1182,10 @@ setup just prior to BL31 exit during cold boot. The default weak
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implementation of this function will invoke `console_uninit()` which will
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suppress any BL31 runtime logs.
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In ARM Standard platforms, this function will initialize the BL31 runtime
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console which will cause all further BL31 logs to be output to the
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runtime console.
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### Function : bl31_get_next_image_info() [mandatory]
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@ -74,8 +74,11 @@
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#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_UART0_BASE
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#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART0_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE SOC_CSS_UART1_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
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#define PLAT_ARM_BL31_RUN_UART_BASE SOC_CSS_UART1_BASE
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#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART0_BASE
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#define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ
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@ -170,6 +170,7 @@ uint32_t arm_get_spsr_for_bl33_entry(void);
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void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
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void *plat_params_from_bl2);
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void arm_bl31_platform_setup(void);
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void arm_bl31_plat_runtime_setup(void);
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void arm_bl31_plat_arch_setup(void);
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/* TSP utility functions */
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@ -78,8 +78,11 @@
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#define PLAT_ARM_BOOT_UART_BASE V2M_IOFPGA_UART0_BASE
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#define PLAT_ARM_BOOT_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE V2M_IOFPGA_UART1_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ V2M_IOFPGA_UART1_CLK_IN_HZ
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#define PLAT_ARM_BL31_RUN_UART_BASE V2M_IOFPGA_UART1_BASE
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#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ V2M_IOFPGA_UART1_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART2_BASE
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#define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART2_CLK_IN_HZ
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@ -224,11 +224,27 @@ void arm_bl31_platform_setup(void)
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plat_arm_pwrc_setup();
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}
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/*******************************************************************************
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* Perform any BL3-1 platform runtime setup prior to BL3-1 exit common to ARM
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* standard platforms
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******************************************************************************/
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void arm_bl31_plat_runtime_setup(void)
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{
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/* Initialize the runtime console */
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console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
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ARM_CONSOLE_BAUDRATE);
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}
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void bl31_platform_setup(void)
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{
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arm_bl31_platform_setup();
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}
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void bl31_plat_runtime_setup(void)
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{
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arm_bl31_plat_runtime_setup();
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}
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/*******************************************************************************
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* Perform the very early platform specific architectural setup here. At the
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* moment this is only intializes the mmu in a quick and dirty way.
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@ -158,7 +158,7 @@ int arm_validate_ns_entrypoint(uintptr_t entrypoint)
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*****************************************************************************/
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void arm_system_pwr_domain_resume(void)
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{
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console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ,
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console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
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ARM_CONSOLE_BAUDRATE);
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/* Assert system power domain is available on the platform */
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