mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-18 02:24:18 +00:00
Merge changes from topic "hikey960-el3-spmc" into integration
* changes: feat(hikey960): read serial number from UFS feat(hikey960): add a FF-A logical partition feat(hikey960): add memory sharing hooks for SPMC_AT_EL3 feat(hikey960): add plat-defines for SPMC_AT_EL3 feat(hikey960): define a datastore for SPMC_AT_EL3 feat(hikey960): add SP manifest for SPMC_AT_EL3 feat(hikey960): increase secure workspace to 64MB feat(hikey960): upgrade to xlat_tables_v2
This commit is contained in:
Olivier Deprez
TrustedFirmware Code Review
commit
07217574af
12 changed files with 359 additions and 22 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -12,7 +12,7 @@
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <plat/common/platform.h>
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#include "../hikey960_def.h"
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@ -69,7 +69,6 @@ static const mmap_region_t hikey960_mmap[] = {
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#ifdef IMAGE_BL31
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static const mmap_region_t hikey960_mmap[] = {
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MAP_DEVICE,
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MAP_TSP_MEM,
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{0}
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};
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -138,6 +138,22 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
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#endif
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.next_handoff_image_id = INVALID_IMAGE_ID,
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},
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#ifdef SPD_spmd
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/* Fill TOS_FW_CONFIG related information */
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{
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.image_id = TOS_FW_CONFIG_ID,
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
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VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
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SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
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VERSION_2, image_info_t, 0),
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.image_info.image_base = DDR_SEC_CONFIG_BASE,
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.image_info.image_max_size = DDR_SEC_CONFIG_SIZE,
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.next_handoff_image_id = INVALID_IMAGE_ID,
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},
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#endif
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# endif /* BL32_BASE */
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/* Fill BL33 related information */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -31,6 +31,9 @@
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#define BL2_RW_BASE (BL_CODE_END)
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/* BL2 platform parameters passed to BL31 */
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static plat_params_from_bl2_t plat_params_from_bl2;
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static meminfo_t bl2_el3_tzram_layout;
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static console_t console;
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extern int load_lpm3(void);
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@ -217,6 +220,11 @@ int hikey960_bl2_handle_post_image_load(unsigned int image_id)
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assert(bl_mem_params);
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switch (image_id) {
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case BL31_IMAGE_ID:
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/* Pass BL2 platform parameter to BL31 */
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bl_mem_params->ep_info.args.arg1 = (uint64_t) &plat_params_from_bl2;
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break;
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#ifdef __aarch64__
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case BL32_IMAGE_ID:
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#ifdef SPD_opteed
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@ -307,6 +315,8 @@ void bl2_el3_plat_arch_setup(void)
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void bl2_platform_setup(void)
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{
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int ret;
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/* disable WDT0 */
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if (mmio_read_32(WDT0_REG_BASE + WDT_LOCK_OFFSET) == WDT_LOCKED) {
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mmio_write_32(WDT0_REG_BASE + WDT_LOCK_OFFSET, WDT_UNLOCK);
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@ -322,4 +332,13 @@ void bl2_platform_setup(void)
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hikey960_gpio_init();
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hikey960_init_ufs();
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hikey960_io_setup();
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/* Read serial number from storage */
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plat_params_from_bl2.fastboot_serno = 0;
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ret = hikey960_load_serialno(&plat_params_from_bl2.fastboot_serno);
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if (ret != 0) {
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ERROR("BL2: could not read serial number\n");
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}
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INFO("BL2: fastboot_serno %lx\n", plat_params_from_bl2.fastboot_serno);
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flush_dcache_range((uintptr_t)&plat_params_from_bl2, sizeof(plat_params_from_bl2_t));
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -20,7 +20,9 @@
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#include <drivers/console.h>
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#include <drivers/generic_delay_timer.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <plat/common/platform.h>
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#include <services/el3_spmc_ffa_memory.h>
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#include <hi3660.h>
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#include <hisi_ipc.h>
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@ -31,6 +33,9 @@ static entry_point_info_t bl32_ep_info;
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static entry_point_info_t bl33_ep_info;
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static console_t console;
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/* fastboot serial number consumed by Kinibi SPD/LP for gpd.tee.deviceID. */
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uint64_t fastboot_serno;
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/******************************************************************************
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* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
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* interrupts.
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@ -71,6 +76,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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{
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unsigned int id, uart_base;
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void *from_bl2;
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plat_params_from_bl2_t *plat_params_from_bl2 = (plat_params_from_bl2_t *) arg1;
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from_bl2 = (void *) arg0;
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@ -89,6 +95,10 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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cci_init(CCI400_REG_BASE, cci_map, ARRAY_SIZE(cci_map));
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cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
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/* Fastboot serial number passed from BL2 as a platform parameter */
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fastboot_serno = plat_params_from_bl2->fastboot_serno;
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INFO("BL31: fastboot_serno %lx\n", fastboot_serno);
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/*
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* Check params passed from BL2 should not be NULL,
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*/
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@ -119,6 +129,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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void bl31_plat_arch_setup(void)
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{
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#if SPMC_AT_EL3
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mmap_add_region(DDR2_SEC_BASE, DDR2_SEC_BASE, DDR2_SEC_SIZE,
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MT_MEMORY | MT_RW | MT_SECURE);
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#endif
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hikey960_init_mmu_el3(BL31_BASE,
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BL31_LIMIT - BL31_BASE,
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BL_CODE_BASE,
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@ -156,6 +171,48 @@ static void hikey960_iomcu_dma_init(void)
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}
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}
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#if SPMC_AT_EL3
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/*
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* On the hikey960 platform when using the EL3 SPMC implementation allocate the
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* datastore for tracking shared memory descriptors in the RAM2 DRAM section
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* to ensure sufficient storage can be allocated.
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* Provide an implementation of the accessor method to allow the datastore
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* details to be retrieved by the SPMC.
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* The SPMC will take care of initializing the memory region.
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*/
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#define SPMC_SHARED_MEMORY_OBJ_SIZE (512 * 1024)
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__section("ram2_region") uint8_t plat_spmc_shmem_datastore[SPMC_SHARED_MEMORY_OBJ_SIZE];
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int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size)
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{
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*datastore = plat_spmc_shmem_datastore;
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*size = SPMC_SHARED_MEMORY_OBJ_SIZE;
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return 0;
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}
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/*
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* Add dummy implementations of memory management related platform hooks.
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* These can be used to implement platform specific functionality to support
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* a memory sharing/lending operation.
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*
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* Note: The hooks must be located as part of the initial share request and
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* final reclaim to prevent order dependencies with operations that may take
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* place in the normal world without visibility of the SPMC.
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*/
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int plat_spmc_shmem_begin(struct ffa_mtd *desc)
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{
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return 0;
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}
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int plat_spmc_shmem_reclaim(struct ffa_mtd *desc)
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{
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return 0;
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}
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#endif
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void bl31_platform_setup(void)
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{
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/* Initialize the GIC driver, cpu and distributor interfaces */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -21,15 +21,21 @@
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#define HIKEY960_DRAM_ID 1
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/*
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* DDR for OP-TEE (32MB from 0x3E00000-0x3FFFFFFF) is divided in several
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* DDR for TEE (80MB from 0x3E00000-0x43000FFF) is divided into several
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* regions:
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* - Secure DDR (default is the top 16MB) used by OP-TEE
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* - SPMC manifest (4KB at the top) used by SPMC_AT_EL3 and the TEE
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* - Datastore for SPMC_AT_EL3 (4MB at the top) used by BL31
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* - Secure DDR (default is the top 60MB) used by OP-TEE
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* - Non-secure DDR used by OP-TEE (shared memory and padding) (4MB)
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* - Secure DDR (4MB aligned on 4MB) for OP-TEE's "Secure Data Path" feature
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* - Non-secure DDR (8MB) reserved for OP-TEE's future use
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*/
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#define DDR_SEC_SIZE 0x01000000
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#define DDR_SEC_SIZE 0x03C00000 /* reserve 60MB secure memory */
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#define DDR_SEC_BASE 0x3F000000
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#define DDR2_SEC_SIZE 0x00400000 /* SPMC_AT_EL3: 4MB for BL31 RAM2 */
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#define DDR2_SEC_BASE 0x42C00000
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#define DDR_SEC_CONFIG_SIZE 0x00001000 /* SPMC_AT_EL3: SPMC manifest */
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#define DDR_SEC_CONFIG_BASE 0x43000000
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#define DDR_SDP_SIZE 0x00400000
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#define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \
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@ -50,4 +56,27 @@
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#define HIKEY960_UFS_DATA_BASE 0x10000000
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#define HIKEY960_UFS_DATA_SIZE 0x0A000000 /* 160MB */
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#if defined(SPMC_AT_EL3)
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/*
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* Number of Secure Partitions supported.
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* SPMC at EL3, uses this count to configure the maximum number of supported
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* secure partitions.
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*/
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#define SECURE_PARTITION_COUNT 1
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/*
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* Number of Nwld Partitions supported.
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* SPMC at EL3, uses this count to configure the maximum number of supported
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* nwld partitions.
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*/
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#define NS_PARTITION_COUNT 1
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/*
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* Number of Logical Partitions supported.
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* SPMC at EL3, uses this count to configure the maximum number of supported
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* logical partitions.
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*/
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#define MAX_EL3_LP_DESCS_COUNT 1
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#endif /* SPMC_AT_EL3 */
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#endif /* HIKEY960_DEF_H */
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61
plat/hisilicon/hikey960/hikey960_el3_spmc_logical_sp.c
Normal file
61
plat/hisilicon/hikey960/hikey960_el3_spmc_logical_sp.c
Normal file
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@ -0,0 +1,61 @@
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/*
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* Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
|
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <services/el3_spmc_logical_sp.h>
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#include <services/ffa_svc.h>
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#include <smccc_helpers.h>
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#define LP_PARTITION_ID 0xC001
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#define LP_UUID {0x47a3bf57, 0xe98e43ad, 0xb7db524f, 0x1588f4e3}
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/* Our Logical SP currently only supports receipt of direct messaging. */
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#define PARTITION_PROPERTIES FFA_PARTITION_DIRECT_REQ_RECV
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static int32_t sp_init(void)
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{
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INFO("LSP: Init function called.\n");
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return 0;
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}
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|
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static uint64_t handle_ffa_direct_request(uint32_t smc_fid, bool secure_origin,
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uint64_t x1, uint64_t x2, uint64_t x3,
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uint64_t x4, void *cookie,
|
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void *handle, uint64_t flags)
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{
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uint64_t ret;
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|
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/* Determine if we have a 64 or 32 direct request. */
|
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if (smc_fid == FFA_MSG_SEND_DIRECT_REQ_SMC32) {
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ret = FFA_MSG_SEND_DIRECT_RESP_SMC32;
|
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} else if (smc_fid == FFA_MSG_SEND_DIRECT_REQ_SMC64) {
|
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ret = FFA_MSG_SEND_DIRECT_RESP_SMC64;
|
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} else {
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panic(); /* Unknown SMC. */
|
||||
}
|
||||
/*
|
||||
* Handle the incoming request. For testing purposes we echo the
|
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* incoming message.
|
||||
*/
|
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INFO("Logical Partition: Received Direct Request from %s world!\n",
|
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secure_origin ? "Secure" : "Normal");
|
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|
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/*
|
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* Logical SP's must always send a direct response so we can populate
|
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* our response directly.
|
||||
*/
|
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SMC_RET8(handle, ret, 0, 0, x4, 0, 0, 0, 0);
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}
|
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|
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/* Register logical partition */
|
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DECLARE_LOGICAL_PARTITION(
|
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my_logical_partition,
|
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sp_init, /* Init Function */
|
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LP_PARTITION_ID, /* FF-A Partition ID */
|
||||
LP_UUID, /* UUID */
|
||||
PARTITION_PROPERTIES, /* Partition Properties. */
|
||||
handle_ffa_direct_request /* Callback for direct requests. */
|
||||
);
|
||||
|
|
@ -1,9 +1,10 @@
|
|||
/*
|
||||
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
#include <common/bl_common.h>
|
||||
#include <common/desc_image_load.h>
|
||||
#include <plat/common/platform.h>
|
||||
|
|
@ -25,10 +26,30 @@ bl_load_info_t *plat_get_bl_image_load_info(void)
|
|||
return get_bl_load_info_from_mem_params_desc();
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* ARM helper function to return the list of executable images. Since the default
|
||||
* descriptors are allocated within BL2 RW memory, this prevents BL31/BL32
|
||||
* overlay of BL2 memory. Hence this function also copies the descriptors to a
|
||||
* pre-allocated memory indicated by ARM_BL2_MEM_DESC_BASE.
|
||||
******************************************************************************/
|
||||
struct bl_params *hikey960_get_next_bl_params(void)
|
||||
{
|
||||
bl_params_t *next_bl_params;
|
||||
|
||||
next_bl_params = get_next_bl_params_from_mem_params_desc();
|
||||
assert(next_bl_params != NULL);
|
||||
|
||||
populate_next_bl_params_config(next_bl_params);
|
||||
|
||||
return next_bl_params;
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* This function returns the list of executable images.
|
||||
******************************************************************************/
|
||||
bl_params_t *plat_get_next_bl_params(void)
|
||||
{
|
||||
return get_next_bl_params_from_mem_params_desc();
|
||||
return hikey960_get_next_bl_params();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
|
@ -23,6 +23,9 @@
|
|||
#include <lib/semihosting.h>
|
||||
#include <tools_share/firmware_image_package.h>
|
||||
|
||||
#include "hikey960_def.h"
|
||||
#include "hikey960_private.h"
|
||||
|
||||
struct plat_io_policy {
|
||||
uintptr_t *dev_handle;
|
||||
uintptr_t image_spec;
|
||||
|
|
@ -45,6 +48,12 @@ static const io_block_spec_t ufs_gpt_spec = {
|
|||
(PLAT_PARTITION_MAX_ENTRIES / 4 + 2),
|
||||
};
|
||||
|
||||
/* Fastboot serial number stored within first UFS device blocks */
|
||||
static const io_block_spec_t ufs_fastboot_spec = {
|
||||
.offset = UFS_BASE,
|
||||
.length = 1 << 20,
|
||||
};
|
||||
|
||||
static const io_block_dev_spec_t ufs_dev_spec = {
|
||||
/* It's used as temp buffer in block driver. */
|
||||
.buffer = {
|
||||
|
|
@ -78,6 +87,12 @@ static const io_uuid_spec_t bl32_extra2_uuid_spec = {
|
|||
.uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA2,
|
||||
};
|
||||
|
||||
#ifdef SPD_spmd
|
||||
static const io_uuid_spec_t bl32_tos_fw_spec = {
|
||||
.uuid = UUID_TOS_FW_CONFIG,
|
||||
};
|
||||
#endif
|
||||
|
||||
static const io_uuid_spec_t bl33_uuid_spec = {
|
||||
.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
|
||||
};
|
||||
|
|
@ -151,6 +166,15 @@ static const struct plat_io_policy policies[] = {
|
|||
(uintptr_t)&bl32_extra2_uuid_spec,
|
||||
check_fip
|
||||
},
|
||||
|
||||
#ifdef SPD_spmd
|
||||
[TOS_FW_CONFIG_ID] = {
|
||||
&fip_dev_handle,
|
||||
(uintptr_t)&bl32_tos_fw_spec,
|
||||
check_fip
|
||||
},
|
||||
#endif
|
||||
|
||||
[BL33_IMAGE_ID] = {
|
||||
&fip_dev_handle,
|
||||
(uintptr_t)&bl33_uuid_spec,
|
||||
|
|
@ -241,6 +265,54 @@ static int check_fip(const uintptr_t spec)
|
|||
return result;
|
||||
}
|
||||
|
||||
int hikey960_load_serialno(uint64_t *serno)
|
||||
{
|
||||
int result;
|
||||
size_t len = 0;
|
||||
uintptr_t local_handle;
|
||||
uint64_t buf[HIKEY960_SERIAL_NUMBER_SIZE / sizeof(uint64_t)];
|
||||
|
||||
if (serno == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
result = io_dev_init(ufs_dev_handle, (uintptr_t)NULL);
|
||||
if (result != 0) {
|
||||
return result;
|
||||
}
|
||||
|
||||
result = io_open(ufs_dev_handle,
|
||||
(uintptr_t)&ufs_fastboot_spec, &local_handle);
|
||||
if (result != 0) {
|
||||
return result;
|
||||
}
|
||||
|
||||
result = io_seek(local_handle, IO_SEEK_SET,
|
||||
HIKEY960_SERIAL_NUMBER_LBA * UFS_BLOCK_SIZE);
|
||||
if (result != 0) {
|
||||
goto closing;
|
||||
}
|
||||
|
||||
result = io_read(local_handle, (uintptr_t)buf,
|
||||
HIKEY960_SERIAL_NUMBER_SIZE, &len);
|
||||
if (result != 0) {
|
||||
goto closing;
|
||||
}
|
||||
|
||||
if (len != HIKEY960_SERIAL_NUMBER_SIZE) {
|
||||
result = -1;
|
||||
goto closing;
|
||||
}
|
||||
|
||||
/* UEFI fastboot app stores a 16 bytes blob */
|
||||
/* We extract only relevant 8 bytes serial number */
|
||||
*serno = buf[1];
|
||||
|
||||
closing:
|
||||
io_close(local_handle);
|
||||
return result;
|
||||
}
|
||||
|
||||
void hikey960_io_setup(void)
|
||||
{
|
||||
int result;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
|
@ -9,6 +9,10 @@
|
|||
|
||||
#include <common/bl_common.h>
|
||||
|
||||
/* Fastboot serial number */
|
||||
#define HIKEY960_SERIAL_NUMBER_LBA (UFS_BASE + 20)
|
||||
#define HIKEY960_SERIAL_NUMBER_SIZE 16
|
||||
|
||||
/*
|
||||
* Function and variable prototypes
|
||||
*/
|
||||
|
|
@ -27,6 +31,7 @@ void hikey960_init_mmu_el3(unsigned long total_base,
|
|||
void hikey960_io_setup(void);
|
||||
int hikey960_read_boardid(unsigned int *id);
|
||||
int hikey960_set_fip_addr(unsigned int image_id, const char *name);
|
||||
int hikey960_load_serialno(uint64_t *serno);
|
||||
void hikey960_clk_init(void);
|
||||
void hikey960_pmu_init(void);
|
||||
void hikey960_regulator_enable(void);
|
||||
|
|
@ -39,4 +44,12 @@ void clr_retention_ticks(unsigned int val);
|
|||
void clr_ex(void);
|
||||
void nop(void);
|
||||
|
||||
/*******************************************************************************
|
||||
* Struct for parameters received from BL2
|
||||
******************************************************************************/
|
||||
typedef struct plat_params_from_bl2 {
|
||||
/* Fastboot serial number gathered from UFS */
|
||||
uint64_t fastboot_serno;
|
||||
} plat_params_from_bl2_t;
|
||||
|
||||
#endif /* HIKEY960_PRIVATE_H */
|
||||
|
|
|
|||
22
plat/hisilicon/hikey960/include/plat.ld.S
Normal file
22
plat/hisilicon/hikey960/include/plat.ld.S
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef PLAT_LD_S
|
||||
#define PLAT_LD_S
|
||||
|
||||
#include <lib/xlat_tables/xlat_tables_defs.h>
|
||||
|
||||
MEMORY {
|
||||
RAM2 (rw): ORIGIN = DDR2_SEC_BASE, LENGTH = DDR2_SEC_SIZE
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
ram2_region (NOLOAD) : {
|
||||
*(ram2_region)
|
||||
}>RAM2
|
||||
}
|
||||
|
||||
#endif /* PLAT_LD_S */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
|
@ -114,15 +114,23 @@
|
|||
/*
|
||||
* Platform specific page table and MMU setup constants
|
||||
*/
|
||||
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
|
||||
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
|
||||
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 36)
|
||||
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 36)
|
||||
|
||||
#if defined(IMAGE_BL1) || defined(IMAGE_BL31) || defined(IMAGE_BL32)
|
||||
#if defined(IMAGE_BL1) || defined(IMAGE_BL32)
|
||||
#define MAX_XLAT_TABLES 3
|
||||
#endif
|
||||
|
||||
#ifdef IMAGE_BL2
|
||||
#define MAX_XLAT_TABLES 4
|
||||
#if defined(IMAGE_BL2)
|
||||
#define MAX_XLAT_TABLES 5
|
||||
#endif
|
||||
|
||||
#if defined(IMAGE_BL31)
|
||||
#if defined(SPMC_AT_EL3)
|
||||
#define MAX_XLAT_TABLES 17
|
||||
#else
|
||||
#define MAX_XLAT_TABLES 5
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define MAX_MMAP_REGIONS 16
|
||||
|
|
|
|||
|
|
@ -46,11 +46,12 @@ PLAT_INCLUDES := -Iplat/hisilicon/hikey960/include
|
|||
PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \
|
||||
drivers/delay_timer/delay_timer.c \
|
||||
drivers/delay_timer/generic_delay_timer.c \
|
||||
lib/xlat_tables/aarch64/xlat_tables.c \
|
||||
lib/xlat_tables/xlat_tables_common.c \
|
||||
plat/hisilicon/hikey960/aarch64/hikey960_common.c \
|
||||
plat/hisilicon/hikey960/hikey960_boardid.c
|
||||
|
||||
include lib/xlat_tables_v2/xlat_tables.mk
|
||||
PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
|
||||
|
||||
HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
|
||||
drivers/arm/gic/v2/gicv2_main.c \
|
||||
drivers/arm/gic/v2/gicv2_helpers.c \
|
||||
|
|
@ -160,3 +161,22 @@ ERRATA_A53_843419 := 1
|
|||
ERRATA_A53_855873 := 1
|
||||
|
||||
FIP_ALIGN := 512
|
||||
|
||||
# SPM dispatcher
|
||||
ifeq (${SPD},spmd)
|
||||
ifeq (${SPMC_AT_EL3},1)
|
||||
# include device tree helper library
|
||||
include lib/libfdt/libfdt.mk
|
||||
BL31_SOURCES += common/fdt_wrappers.c \
|
||||
${LIBFDT_SRCS} \
|
||||
common/uuid.c
|
||||
|
||||
# Add support for platform supplied linker script for BL31 build
|
||||
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
|
||||
endif
|
||||
|
||||
ifeq ($(PLAT_SP_MANIFEST_DTS),)
|
||||
$(error "Error: A SP manifest is required for the SPMC.")
|
||||
endif
|
||||
FDT_SOURCES += ${PLAT_SP_MANIFEST_DTS}
|
||||
endif
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue