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chore(cpus): fix cve order in Cortex-A77

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This patch rearranges CVE-2024-5660 apply order in Cortex-A77.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I41d76268ce2248bfd3600bbf6b89d16b6bdce8f0
This commit is contained in:
Arvind Ram Prakash 2025-03-19 15:30:47 -05:00
parent 3426ed4966
commit 06f2cfb8ac
1 changed files with 7 additions and 7 deletions

14
lib/cpus/aarch64/cortex_a77.S
View file

@ -28,13 +28,6 @@ cpu_reset_prologue cortex_a77
wa_cve_2022_23960_bhb_vector_table CORTEX_A77_BHB_LOOP_COUNT, cortex_a77
#endif /* WORKAROUND_CVE_2022_23960 */
/* Disable hardware page aggregation. Enables mitigation for `CVE-2024-5660` */
workaround_reset_start cortex_a77, CVE(2024, 5660), WORKAROUND_CVE_2024_5660
sysreg_bit_set CORTEX_A77_CPUECTLR_EL1, BIT(46)
workaround_reset_end cortex_a77, CVE(2024, 5660)
check_erratum_ls cortex_a77, CVE(2024, 5660), CPU_REV(1, 1)
workaround_reset_start cortex_a77, ERRATUM(1508412), ERRATA_A77_1508412
/* move cpu revision in again and compare against r0p0 */
mov x0, x7
@ -150,6 +143,13 @@ workaround_reset_end cortex_a77, CVE(2022, 23960)
check_erratum_chosen cortex_a77, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
/* Disable hardware page aggregation. Enables mitigation for `CVE-2024-5660` */
workaround_reset_start cortex_a77, CVE(2024, 5660), WORKAROUND_CVE_2024_5660
sysreg_bit_set CORTEX_A77_CPUECTLR_EL1, BIT(46)
workaround_reset_end cortex_a77, CVE(2024, 5660)
check_erratum_ls cortex_a77, CVE(2024, 5660), CPU_REV(1, 1)
/* -------------------------------------------------
* The CPU Ops reset function for Cortex-A77. Must follow AAPCS.
* -------------------------------------------------