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Merge "fix(rmm): add support for BRBCR_EL2 register for feat_brbe" into integration

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Soby Mathew 2025-02-24 15:14:07 +01:00 • committed by TrustedFirmware Code Review
commit 0690c237a4
4 changed files with 38 additions and 2 deletions
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5
include/arch/aarch64/arch.h
View file

@ -1529,6 +1529,11 @@
#define SCTLR2_EL2 S3_4_C1_C0_3
#define SCTLR2_EL1 S3_0_C1_C0_3
/*******************************************************************************
* FEAT_BRBE - Branch Record Buffer Extension Registers
******************************************************************************/
#define BRBCR_EL2 S2_4_C9_C0_0
/*******************************************************************************
* FEAT_LS64_ACCDATA - LoadStore64B with status data
******************************************************************************/

5
include/arch/aarch64/arch_helpers.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -716,6 +716,9 @@ DEFINE_RENAME_SYSREG_RW_FUNCS(clusterpmxevtyper_el1, CLUSTERPMXEVTYPER_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(cpuppmcr_el3, CPUPPMCR_EL3)
DEFINE_RENAME_SYSREG_RW_FUNCS(cpumpmmcr_el3, CPUMPMMCR_EL3)
/* Armv9.1 FEAT_BRBE Registers */
DEFINE_RENAME_SYSREG_RW_FUNCS(brbcr_el2, BRBCR_EL2)
/* Armv9.2 RME Registers */
DEFINE_RENAME_SYSREG_RW_FUNCS(gptbr_el3, GPTBR_EL3)
DEFINE_RENAME_SYSREG_RW_FUNCS(gpccr_el3, GPCCR_EL3)

19
include/lib/el3_runtime/context_el2.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -142,6 +142,10 @@ typedef struct el2_sctlr2_regs {
uint64_t sctlr2_el2;
} el2_sctlr2_regs_t;
typedef struct el2_brbe_regs {
uint64_t brbcr_el2;
} el2_brbe_regs_t;
typedef struct el2_sysregs {
el2_common_regs_t common;
@ -214,6 +218,10 @@ typedef struct el2_sysregs {
el2_sctlr2_regs_t sctlr2;
#endif
#if ENABLE_BRBE_FOR_NS
el2_brbe_regs_t brbe;
#endif
} el2_sysregs_t;
/*
@ -384,6 +392,15 @@ typedef struct el2_sysregs {
#define write_el2_ctx_sctlr2(ctx, reg, val)
#endif /* ENABLE_FEAT_SCTLR2 */
#if ENABLE_BRBE_FOR_NS
#define read_el2_ctx_brbe(ctx, reg) (((ctx)->brbe).reg)
#define write_el2_ctx_brbe(ctx, reg, val) ((((ctx)->brbe).reg) \
= (uint64_t) (val))
#else
#define read_el2_ctx_brbe(ctx, reg) ULL(0)
#define write_el2_ctx_brbe(ctx, reg, val)
#endif /* ENABLE_BRBE_FOR_NS */
/******************************************************************************/
#endif /* __ASSEMBLER__ */

11
lib/el3_runtime/aarch64/context_mgmt.c
View file

@ -200,6 +200,9 @@ static void setup_realm_context(cpu_context_t *ctx, const struct entry_point_inf
debugv8p9_extended_bp_wp_enable(ctx);
}
if (is_feat_brbe_supported()) {
brbe_enable(ctx);
}
}
#endif /* ENABLE_RME */
@ -1521,6 +1524,10 @@ void cm_el2_sysregs_context_save(uint32_t security_state)
write_el2_ctx_sxpoe(el2_sysregs_ctx, por_el2, read_por_el2());
}
if (is_feat_brbe_supported()) {
write_el2_ctx_brbe(el2_sysregs_ctx, brbcr_el2, read_brbcr_el2());
}
if (is_feat_s2pie_supported()) {
write_el2_ctx_s2pie(el2_sysregs_ctx, s2pir_el2, read_s2pir_el2());
}
@ -1624,6 +1631,10 @@ void cm_el2_sysregs_context_restore(uint32_t security_state)
if (is_feat_sctlr2_supported()) {
write_sctlr2_el2(read_el2_ctx_sctlr2(el2_sysregs_ctx, sctlr2_el2));
}
if (is_feat_brbe_supported()) {
write_brbcr_el2(read_el2_ctx_brbe(el2_sysregs_ctx, brbcr_el2));
}
}
#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */