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drivers: renesas: rzg: Add QoS support for RZ/G2E
Add QoS support for RZ/G2E SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Change-Id: I2c4373807ab8c550d86d6abc97f5b01f2fb78fb3
This commit is contained in:
Lad Prabhakar
parent
5bfea97e1c
commit
05cc21de5d
7 changed files with 690 additions and 0 deletions
140
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
Normal file
140
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
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@ -0,0 +1,140 @@
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/*
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* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include "qos_init_g2e_v10.h"
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#include "../qos_common.h"
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#include "../qos_reg.h"
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#define RCAR_QOS_VERSION "rev.0.05"
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#define REF_ARS_ARBSTOPCYCLE_G2E (((SL_INIT_SSLOTCLK_G2E) - 5U) << 16U)
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#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
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#if RCAR_REF_INT == RCAR_REF_DEFAULT
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#include "qos_init_g2e_v10_mstat390.h"
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#else
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#include "qos_init_g2e_v10_mstat780.h"
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#endif /* RCAR_REF_INT == RCAR_REF_DEFAULT */
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#endif /* RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT */
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static const struct rcar_gen3_dbsc_qos_settings g2e_qos[] = {
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/* BUFCAM settings */
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{ DBSC_DBCAM0CNF1, 0x00043218U },
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{ DBSC_DBCAM0CNF2, 0x000000F4U },
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{ DBSC_DBSCHCNT0, 0x000F0037U },
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{ DBSC_DBSCHSZ0, 0x00000001U },
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{ DBSC_DBSCHRW0, 0x22421111U },
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/* DDR3 */
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{ DBSC_SCFCTST2, 0x012F1123U },
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/* QoS Settings */
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{ DBSC_DBSCHQOS00, 0x00000F00U },
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{ DBSC_DBSCHQOS01, 0x00000B00U },
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{ DBSC_DBSCHQOS02, 0x00000000U },
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{ DBSC_DBSCHQOS03, 0x00000000U },
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{ DBSC_DBSCHQOS40, 0x00000300U },
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{ DBSC_DBSCHQOS41, 0x000002F0U },
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{ DBSC_DBSCHQOS42, 0x00000200U },
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{ DBSC_DBSCHQOS43, 0x00000100U },
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{ DBSC_DBSCHQOS90, 0x00000100U },
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{ DBSC_DBSCHQOS91, 0x000000F0U },
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{ DBSC_DBSCHQOS92, 0x000000A0U },
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{ DBSC_DBSCHQOS93, 0x00000040U },
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{ DBSC_DBSCHQOS130, 0x00000100U },
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{ DBSC_DBSCHQOS131, 0x000000F0U },
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{ DBSC_DBSCHQOS132, 0x000000A0U },
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{ DBSC_DBSCHQOS133, 0x00000040U },
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{ DBSC_DBSCHQOS140, 0x000000C0U },
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{ DBSC_DBSCHQOS141, 0x000000B0U },
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{ DBSC_DBSCHQOS142, 0x00000080U },
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{ DBSC_DBSCHQOS143, 0x00000040U },
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{ DBSC_DBSCHQOS150, 0x00000040U },
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{ DBSC_DBSCHQOS151, 0x00000030U },
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{ DBSC_DBSCHQOS152, 0x00000020U },
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{ DBSC_DBSCHQOS153, 0x00000010U },
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};
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void qos_init_g2e_v10(void)
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{
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rzg_qos_dbsc_setting(g2e_qos, ARRAY_SIZE(g2e_qos), true);
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/* DRAM Split Address mapping */
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#if RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH
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#if RCAR_LSI == RCAR_RZ_G2E
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#error "Don't set DRAM Split 4ch(G2E)"
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#else
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ERROR("DRAM Split 4ch not supported.(G2E)");
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panic();
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#endif
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#elif (RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_2CH)
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#if RCAR_LSI == RCAR_RZ_G2E
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#error "Don't set DRAM Split 2ch(G2E)"
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#else
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ERROR("DRAM Split 2ch not supported.(G2E)");
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panic();
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#endif
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#else
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NOTICE("BL2: DRAM Split is OFF\n");
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#endif
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#if !(RCAR_QOS_TYPE == RCAR_QOS_NONE)
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#if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT
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NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION);
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#endif
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#if RCAR_REF_INT == RCAR_REF_DEFAULT
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NOTICE("BL2: DRAM refresh interval 3.9 usec\n");
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#else
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NOTICE("BL2: DRAM refresh interval 7.8 usec\n");
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#endif
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mmio_write_32(QOSCTRL_RAS, 0x00000020U);
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mmio_write_64(QOSCTRL_DANN, 0x0404020002020201UL);
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mmio_write_32(QOSCTRL_DANT, 0x00100804U);
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mmio_write_32(QOSCTRL_FSS, 0x0000000AU);
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mmio_write_32(QOSCTRL_INSFC, 0x06330001U);
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mmio_write_32(QOSCTRL_EARLYR, 0x00000000U);
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mmio_write_32(QOSCTRL_RACNT0, 0x00010003U);
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mmio_write_32(QOSCTRL_SL_INIT, SL_INIT_REFFSSLOT |
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SL_INIT_SLOTSSLOT | SL_INIT_SSLOTCLK_G2E);
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mmio_write_32(QOSCTRL_REF_ARS, REF_ARS_ARBSTOPCYCLE_G2E);
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/* QOSBW SRAM setting */
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uint32_t i;
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for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
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mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]);
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mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]);
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}
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for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
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mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]);
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mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]);
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}
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/* RT bus Leaf setting */
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mmio_write_32(RT_ACT0, 0x00000000U);
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mmio_write_32(RT_ACT1, 0x00000000U);
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/* CCI bus Leaf setting */
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mmio_write_32(CPU_ACT0, 0x00000003U);
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mmio_write_32(CPU_ACT1, 0x00000003U);
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mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
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mmio_write_32(QOSCTRL_STATQC, 0x00000001U);
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#else
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NOTICE("BL2: QoS is None\n");
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mmio_write_32(QOSCTRL_RAEN, 0x00000001U);
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#endif
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}
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12
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.h
Normal file
12
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.h
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/*
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* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef QOS_INIT_G2E_V10_H
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#define QOS_INIT_G2E_V10_H
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void qos_init_g2e_v10(void);
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#endif /* QOS_INIT_G2E_V10_H */
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245
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10_mstat390.h
Normal file
245
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10_mstat390.h
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/*
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* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef QOS_INIT_G2E_V10_MSTAT390_H
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#define QOS_INIT_G2E_V10_MSTAT390_H
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static uint64_t mstat_fix[] = {
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/* 0x0000, */ 0x0000000000000000UL,
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/* 0x0008, */ 0x0000000000000000UL,
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/* 0x0010, */ 0x0000000000000000UL,
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/* 0x0018, */ 0x0000000000000000UL,
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/* 0x0020, */ 0x0000000000000000UL,
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/* 0x0028, */ 0x0000000000000000UL,
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/* 0x0030, */ 0x001008620000FFFFUL,
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/* 0x0038, */ 0x001008620000FFFFUL,
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/* 0x0040, */ 0x0000000000000000UL,
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/* 0x0048, */ 0x0000000000000000UL,
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/* 0x0050, */ 0x0000000000000000UL,
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/* 0x0058, */ 0x001415260000FFFFUL,
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/* 0x0060, */ 0x001415260000FFFFUL,
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/* 0x0068, */ 0x0000000000000000UL,
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/* 0x0070, */ 0x0000000000000000UL,
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/* 0x0078, */ 0x0000000000000000UL,
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/* 0x0080, */ 0x0000000000000000UL,
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/* 0x0088, */ 0x001414930000FFFFUL,
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/* 0x0090, */ 0x0000000000000000UL,
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/* 0x0098, */ 0x0000000000000000UL,
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/* 0x00a0, */ 0x000C08380000FFFFUL,
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/* 0x00a8, */ 0x000C04110000FFFFUL,
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/* 0x00b0, */ 0x000C04150000FFFFUL,
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/* 0x00b8, */ 0x0000000000000000UL,
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/* 0x00c0, */ 0x000C08380000FFFFUL,
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/* 0x00c8, */ 0x000C04110000FFFFUL,
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/* 0x00d0, */ 0x000C04150000FFFFUL,
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/* 0x00d8, */ 0x0000000000000000UL,
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/* 0x00e0, */ 0x0000000000000000UL,
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/* 0x00e8, */ 0x0000000000000000UL,
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/* 0x00f0, */ 0x0000000000000000UL,
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/* 0x00f8, */ 0x000C084F0000FFFFUL,
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/* 0x0100, */ 0x0000000000000000UL,
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/* 0x0108, */ 0x0000000000000000UL,
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/* 0x0110, */ 0x0000000000000000UL,
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/* 0x0118, */ 0x000C21E40000FFFFUL,
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/* 0x0120, */ 0x0000000000000000UL,
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/* 0x0128, */ 0x0000000000000000UL,
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/* 0x0130, */ 0x0000000000000000UL,
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/* 0x0138, */ 0x001008530000FFFFUL,
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/* 0x0140, */ 0x0000000000000000UL,
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/* 0x0148, */ 0x0000000000000000UL,
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/* 0x0150, */ 0x00100C960000FFFFUL,
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/* 0x0158, */ 0x0000000000000000UL,
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/* 0x0160, */ 0x001008530000FFFFUL,
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/* 0x0168, */ 0x0000000000000000UL,
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/* 0x0170, */ 0x0000000000000000UL,
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/* 0x0178, */ 0x0010042A0000FFFFUL,
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/* 0x0180, */ 0x0000000000000000UL,
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/* 0x0188, */ 0x0000000000000000UL,
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/* 0x0190, */ 0x00101D8D0000FFFFUL,
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/* 0x0198, */ 0x0000000000000000UL,
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/* 0x01a0, */ 0x001008530000FFFFUL,
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/* 0x01a8, */ 0x0000000000000000UL,
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/* 0x01b0, */ 0x0000000000000000UL,
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/* 0x01b8, */ 0x0000000000000000UL,
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/* 0x01c0, */ 0x000C04010000FFFFUL,
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/* 0x01c8, */ 0x000C04010000FFFFUL,
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/* 0x01d0, */ 0x0000000000000000UL,
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/* 0x01d8, */ 0x0000000000000000UL,
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/* 0x01e0, */ 0x0000000000000000UL,
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/* 0x01e8, */ 0x0000000000000000UL,
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/* 0x01f0, */ 0x0000000000000000UL,
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/* 0x01f8, */ 0x0000000000000000UL,
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/* 0x0200, */ 0x0000000000000000UL,
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/* 0x0208, */ 0x0000000000000000UL,
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/* 0x0210, */ 0x0000000000000000UL,
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/* 0x0218, */ 0x0000000000000000UL,
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/* 0x0220, */ 0x0000000000000000UL,
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/* 0x0228, */ 0x0000000000000000UL,
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/* 0x0230, */ 0x0000000000000000UL,
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/* 0x0238, */ 0x0000000000000000UL,
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/* 0x0240, */ 0x0000000000000000UL,
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/* 0x0248, */ 0x0000000000000000UL,
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/* 0x0250, */ 0x0000000000000000UL,
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/* 0x0258, */ 0x0000000000000000UL,
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/* 0x0260, */ 0x0000000000000000UL,
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/* 0x0268, */ 0x001410040000FFFFUL,
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/* 0x0270, */ 0x001404020000FFFFUL,
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/* 0x0278, */ 0x0000000000000000UL,
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/* 0x0280, */ 0x0000000000000000UL,
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/* 0x0288, */ 0x0000000000000000UL,
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/* 0x0290, */ 0x001410040000FFFFUL,
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/* 0x0298, */ 0x001404020000FFFFUL,
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/* 0x02a0, */ 0x000C04090000FFFFUL,
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/* 0x02a8, */ 0x000C04090000FFFFUL,
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/* 0x02b0, */ 0x0000000000000000UL,
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/* 0x02b8, */ 0x0000000000000000UL,
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/* 0x02c0, */ 0x0000000000000000UL,
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/* 0x02c8, */ 0x0000000000000000UL,
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/* 0x02d0, */ 0x000C04090000FFFFUL,
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/* 0x02d8, */ 0x000C04090000FFFFUL,
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/* 0x02e0, */ 0x0000000000000000UL,
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/* 0x02e8, */ 0x0000000000000000UL,
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/* 0x02f0, */ 0x0000000000000000UL,
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/* 0x02f8, */ 0x0000000000000000UL,
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/* 0x0300, */ 0x0000000000000000UL,
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/* 0x0308, */ 0x0000000000000000UL,
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/* 0x0310, */ 0x0000000000000000UL,
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/* 0x0318, */ 0x0000000000000000UL,
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/* 0x0320, */ 0x0000000000000000UL,
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/* 0x0328, */ 0x0000000000000000UL,
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/* 0x0330, */ 0x0000000000000000UL,
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/* 0x0338, */ 0x0000000000000000UL,
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/* 0x0340, */ 0x0000000000000000UL,
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/* 0x0348, */ 0x0000000000000000UL,
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/* 0x0350, */ 0x0000000000000000UL,
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/* 0x0358, */ 0x0000000000000000UL,
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/* 0x0360, */ 0x0000000000000000UL,
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/* 0x0368, */ 0x0000000000000000UL,
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/* 0x0370, */ 0x000C04020000FFFFUL,
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/* 0x0378, */ 0x000C04020000FFFFUL,
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/* 0x0380, */ 0x000C04090000FFFFUL,
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/* 0x0388, */ 0x000C04090000FFFFUL,
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/* 0x0390, */ 0x0000000000000000UL,
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};
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static uint64_t mstat_be[] = {
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/* 0x0000, */ 0x0000000000000000UL,
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/* 0x0008, */ 0x0000000000000000UL,
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/* 0x0010, */ 0x0000000000000000UL,
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/* 0x0018, */ 0x0000000000000000UL,
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/* 0x0020, */ 0x0000000000000000UL,
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/* 0x0028, */ 0x0012001005F03401UL,
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/* 0x0030, */ 0x0000000000000000UL,
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/* 0x0038, */ 0x0000000000000000UL,
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/* 0x0040, */ 0x0000000000000000UL,
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/* 0x0048, */ 0x0000000000000000UL,
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||||
/* 0x0050, */ 0x0000000000000000UL,
|
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/* 0x0058, */ 0x0000000000000000UL,
|
||||
/* 0x0060, */ 0x0000000000000000UL,
|
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/* 0x0068, */ 0x0000000000000000UL,
|
||||
/* 0x0070, */ 0x0000000000000000UL,
|
||||
/* 0x0078, */ 0x0000000000000000UL,
|
||||
/* 0x0080, */ 0x0000000000000000UL,
|
||||
/* 0x0088, */ 0x0000000000000000UL,
|
||||
/* 0x0090, */ 0x0000000000000000UL,
|
||||
/* 0x0098, */ 0x0000000000000000UL,
|
||||
/* 0x00a0, */ 0x0000000000000000UL,
|
||||
/* 0x00a8, */ 0x0000000000000000UL,
|
||||
/* 0x00b0, */ 0x0000000000000000UL,
|
||||
/* 0x00b8, */ 0x0000000000000000UL,
|
||||
/* 0x00c0, */ 0x0000000000000000UL,
|
||||
/* 0x00c8, */ 0x0000000000000000UL,
|
||||
/* 0x00d0, */ 0x0000000000000000UL,
|
||||
/* 0x00d8, */ 0x0000000000000000UL,
|
||||
/* 0x00e0, */ 0x0000000000000000UL,
|
||||
/* 0x00e8, */ 0x0000000000000000UL,
|
||||
/* 0x00f0, */ 0x0000000000000000UL,
|
||||
/* 0x00f8, */ 0x0000000000000000UL,
|
||||
/* 0x0100, */ 0x0000000000000000UL,
|
||||
/* 0x0108, */ 0x0000000000000000UL,
|
||||
/* 0x0110, */ 0x0000000000000000UL,
|
||||
/* 0x0118, */ 0x0000000000000000UL,
|
||||
/* 0x0120, */ 0x0000000000000000UL,
|
||||
/* 0x0128, */ 0x0000000000000000UL,
|
||||
/* 0x0130, */ 0x0000000000000000UL,
|
||||
/* 0x0138, */ 0x0000000000000000UL,
|
||||
/* 0x0140, */ 0x0000000000000000UL,
|
||||
/* 0x0148, */ 0x0000000000000000UL,
|
||||
/* 0x0150, */ 0x0000000000000000UL,
|
||||
/* 0x0158, */ 0x0000000000000000UL,
|
||||
/* 0x0160, */ 0x0000000000000000UL,
|
||||
/* 0x0168, */ 0x0000000000000000UL,
|
||||
/* 0x0170, */ 0x0000000000000000UL,
|
||||
/* 0x0178, */ 0x0000000000000000UL,
|
||||
/* 0x0180, */ 0x0000000000000000UL,
|
||||
/* 0x0188, */ 0x0000000000000000UL,
|
||||
/* 0x0190, */ 0x0000000000000000UL,
|
||||
/* 0x0198, */ 0x0000000000000000UL,
|
||||
/* 0x01a0, */ 0x0000000000000000UL,
|
||||
/* 0x01a8, */ 0x0000000000000000UL,
|
||||
/* 0x01b0, */ 0x0000000000000000UL,
|
||||
/* 0x01b8, */ 0x0000000000000000UL,
|
||||
/* 0x01c0, */ 0x0021060005FFFC01UL,
|
||||
/* 0x01c8, */ 0x0021060005FFFC01UL,
|
||||
/* 0x01d0, */ 0x0000000000000000UL,
|
||||
/* 0x01d8, */ 0x0000000000000000UL,
|
||||
/* 0x01e0, */ 0x0000000000000000UL,
|
||||
/* 0x01e8, */ 0x0000000000000000UL,
|
||||
/* 0x01f0, */ 0x0000000000000000UL,
|
||||
/* 0x01f8, */ 0x0000000000000000UL,
|
||||
/* 0x0200, */ 0x0000000000000000UL,
|
||||
/* 0x0208, */ 0x0000000000000000UL,
|
||||
/* 0x0210, */ 0x0000000000000000UL,
|
||||
/* 0x0218, */ 0x0011010005F79801UL,
|
||||
/* 0x0220, */ 0x0011010005F79801UL,
|
||||
/* 0x0228, */ 0x0000000000000000UL,
|
||||
/* 0x0230, */ 0x0011010005F79801UL,
|
||||
/* 0x0238, */ 0x0011010005F79801UL,
|
||||
/* 0x0240, */ 0x0012010005F79801UL,
|
||||
/* 0x0248, */ 0x0011010005F79801UL,
|
||||
/* 0x0250, */ 0x0012010005F79801UL,
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||||
/* 0x0258, */ 0x0011010005F79801UL,
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/* 0x0260, */ 0x0000000000000000UL,
|
||||
/* 0x0268, */ 0x0000000000000000UL,
|
||||
/* 0x0270, */ 0x0000000000000000UL,
|
||||
/* 0x0278, */ 0x0000000000000000UL,
|
||||
/* 0x0280, */ 0x0000000000000000UL,
|
||||
/* 0x0288, */ 0x0000000000000000UL,
|
||||
/* 0x0290, */ 0x0000000000000000UL,
|
||||
/* 0x0298, */ 0x0000000000000000UL,
|
||||
/* 0x02a0, */ 0x0000000000000000UL,
|
||||
/* 0x02a8, */ 0x0000000000000000UL,
|
||||
/* 0x02b0, */ 0x0000000000000000UL,
|
||||
/* 0x02b8, */ 0x0000000000000000UL,
|
||||
/* 0x02c0, */ 0x0000000000000000UL,
|
||||
/* 0x02c8, */ 0x0000000000000000UL,
|
||||
/* 0x02d0, */ 0x0000000000000000UL,
|
||||
/* 0x02d8, */ 0x0000000000000000UL,
|
||||
/* 0x02e0, */ 0x0000000000000000UL,
|
||||
/* 0x02e8, */ 0x0000000000000000UL,
|
||||
/* 0x02f0, */ 0x0011060005FFFC01UL,
|
||||
/* 0x02f8, */ 0x0011060005FFFC01UL,
|
||||
/* 0x0300, */ 0x0000000000000000UL,
|
||||
/* 0x0308, */ 0x0000000000000000UL,
|
||||
/* 0x0310, */ 0x0000000000000000UL,
|
||||
/* 0x0318, */ 0x0012001005F03401UL,
|
||||
/* 0x0320, */ 0x0000000000000000UL,
|
||||
/* 0x0328, */ 0x0000000000000000UL,
|
||||
/* 0x0330, */ 0x0000000000000000UL,
|
||||
/* 0x0338, */ 0x0000000000000000UL,
|
||||
/* 0x0340, */ 0x0000000000000000UL,
|
||||
/* 0x0348, */ 0x0000000000000000UL,
|
||||
/* 0x0350, */ 0x0000000000000000UL,
|
||||
/* 0x0358, */ 0x0012060005FFFC01UL,
|
||||
/* 0x0360, */ 0x0012060005FFFC01UL,
|
||||
/* 0x0368, */ 0x0012001005F03401UL,
|
||||
/* 0x0370, */ 0x0000000000000000UL,
|
||||
/* 0x0378, */ 0x0000000000000000UL,
|
||||
/* 0x0380, */ 0x0000000000000000UL,
|
||||
/* 0x0388, */ 0x0000000000000000UL,
|
||||
/* 0x0390, */ 0x0012001005F03401UL,
|
||||
};
|
||||
#endif /* QOS_INIT_G2E_V10_MSTAT390_H */
|
||||
246
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10_mstat780.h
Normal file
246
drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10_mstat780.h
Normal file
|
|
@ -0,0 +1,246 @@
|
|||
/*
|
||||
* Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef QOS_INIT_G2E_V10_MSTAT780_H
|
||||
#define QOS_INIT_G2E_V10_MSTAT780_H
|
||||
|
||||
static uint64_t mstat_fix[] = {
|
||||
/* 0x0000, */ 0x0000000000000000UL,
|
||||
/* 0x0008, */ 0x0000000000000000UL,
|
||||
/* 0x0010, */ 0x0000000000000000UL,
|
||||
/* 0x0018, */ 0x0000000000000000UL,
|
||||
/* 0x0020, */ 0x0000000000000000UL,
|
||||
/* 0x0028, */ 0x0000000000000000UL,
|
||||
/* 0x0030, */ 0x001010C40000FFFFUL,
|
||||
/* 0x0038, */ 0x001010C40000FFFFUL,
|
||||
/* 0x0040, */ 0x0000000000000000UL,
|
||||
/* 0x0048, */ 0x0000000000000000UL,
|
||||
/* 0x0050, */ 0x0000000000000000UL,
|
||||
/* 0x0058, */ 0x00142A4B0000FFFFUL,
|
||||
/* 0x0060, */ 0x00142A4B0000FFFFUL,
|
||||
/* 0x0068, */ 0x0000000000000000UL,
|
||||
/* 0x0070, */ 0x0000000000000000UL,
|
||||
/* 0x0078, */ 0x0000000000000000UL,
|
||||
/* 0x0080, */ 0x0000000000000000UL,
|
||||
/* 0x0088, */ 0x001429260000FFFFUL,
|
||||
/* 0x0090, */ 0x0000000000000000UL,
|
||||
/* 0x0098, */ 0x0000000000000000UL,
|
||||
/* 0x00a0, */ 0x000C10700000FFFFUL,
|
||||
/* 0x00a8, */ 0x000C08210000FFFFUL,
|
||||
/* 0x00b0, */ 0x000C082A0000FFFFUL,
|
||||
/* 0x00b8, */ 0x0000000000000000UL,
|
||||
/* 0x00c0, */ 0x000C10700000FFFFUL,
|
||||
/* 0x00c8, */ 0x000C08210000FFFFUL,
|
||||
/* 0x00d0, */ 0x000C082A0000FFFFUL,
|
||||
/* 0x00d8, */ 0x0000000000000000UL,
|
||||
/* 0x00e0, */ 0x0000000000000000UL,
|
||||
/* 0x00e8, */ 0x0000000000000000UL,
|
||||
/* 0x00f0, */ 0x00102CAF0000FFFFUL,
|
||||
/* 0x00f8, */ 0x000C0C9D0000FFFFUL,
|
||||
/* 0x0100, */ 0x0000000000000000UL,
|
||||
/* 0x0108, */ 0x0000000000000000UL,
|
||||
/* 0x0110, */ 0x00100CAF0000FFFFUL,
|
||||
/* 0x0118, */ 0x000C43C80000FFFFUL,
|
||||
/* 0x0120, */ 0x0000000000000000UL,
|
||||
/* 0x0128, */ 0x0000000000000000UL,
|
||||
/* 0x0130, */ 0x0000000000000000UL,
|
||||
/* 0x0138, */ 0x00100CA50000FFFFUL,
|
||||
/* 0x0140, */ 0x0000000000000000UL,
|
||||
/* 0x0148, */ 0x0000000000000000UL,
|
||||
/* 0x0150, */ 0x0010152C0000FFFFUL,
|
||||
/* 0x0158, */ 0x0000000000000000UL,
|
||||
/* 0x0160, */ 0x00100CA50000FFFFUL,
|
||||
/* 0x0168, */ 0x0000000000000000UL,
|
||||
/* 0x0170, */ 0x0000000000000000UL,
|
||||
/* 0x0178, */ 0x001008530000FFFFUL,
|
||||
/* 0x0180, */ 0x0000000000000000UL,
|
||||
/* 0x0188, */ 0x0000000000000000UL,
|
||||
/* 0x0190, */ 0x001037190000FFFFUL,
|
||||
/* 0x0198, */ 0x0000000000000000UL,
|
||||
/* 0x01a0, */ 0x00100CA50000FFFFUL,
|
||||
/* 0x01a8, */ 0x0000000000000000UL,
|
||||
/* 0x01b0, */ 0x0000000000000000UL,
|
||||
/* 0x01b8, */ 0x0000000000000000UL,
|
||||
/* 0x01c0, */ 0x000C04010000FFFFUL,
|
||||
/* 0x01c8, */ 0x000C04010000FFFFUL,
|
||||
/* 0x01d0, */ 0x0000000000000000UL,
|
||||
/* 0x01d8, */ 0x0000000000000000UL,
|
||||
/* 0x01e0, */ 0x0000000000000000UL,
|
||||
/* 0x01e8, */ 0x000C04040000FFFFUL,
|
||||
/* 0x01f0, */ 0x000C08110000FFFFUL,
|
||||
/* 0x01f8, */ 0x0000000000000000UL,
|
||||
/* 0x0200, */ 0x0000000000000000UL,
|
||||
/* 0x0208, */ 0x000C04110000FFFFUL,
|
||||
/* 0x0210, */ 0x000C08110000FFFFUL,
|
||||
/* 0x0218, */ 0x0000000000000000UL,
|
||||
/* 0x0220, */ 0x0000000000000000UL,
|
||||
/* 0x0228, */ 0x0000000000000000UL,
|
||||
/* 0x0230, */ 0x0000000000000000UL,
|
||||
/* 0x0238, */ 0x0000000000000000UL,
|
||||
/* 0x0240, */ 0x0000000000000000UL,
|
||||
/* 0x0248, */ 0x0000000000000000UL,
|
||||
/* 0x0250, */ 0x0000000000000000UL,
|
||||
/* 0x0258, */ 0x0000000000000000UL,
|
||||
/* 0x0260, */ 0x000C18530000FFFFUL,
|
||||
/* 0x0268, */ 0x00141C070000FFFFUL,
|
||||
/* 0x0270, */ 0x001404040000FFFFUL,
|
||||
/* 0x0278, */ 0x000C0C210000FFFFUL,
|
||||
/* 0x0280, */ 0x0000000000000000UL,
|
||||
/* 0x0288, */ 0x0000000000000000UL,
|
||||
/* 0x0290, */ 0x00141C070000FFFFUL,
|
||||
/* 0x0298, */ 0x001404040000FFFFUL,
|
||||
/* 0x02a0, */ 0x000C04110000FFFFUL,
|
||||
/* 0x02a8, */ 0x000C04110000FFFFUL,
|
||||
/* 0x02b0, */ 0x0000000000000000UL,
|
||||
/* 0x02b8, */ 0x000C04040000FFFFUL,
|
||||
/* 0x02c0, */ 0x0000000000000000UL,
|
||||
/* 0x02c8, */ 0x0000000000000000UL,
|
||||
/* 0x02d0, */ 0x000C04110000FFFFUL,
|
||||
/* 0x02d8, */ 0x000C04110000FFFFUL,
|
||||
/* 0x02e0, */ 0x0000000000000000UL,
|
||||
/* 0x02e8, */ 0x000C04040000FFFFUL,
|
||||
/* 0x02f0, */ 0x0000000000000000UL,
|
||||
/* 0x02f8, */ 0x0000000000000000UL,
|
||||
/* 0x0300, */ 0x0000000000000000UL,
|
||||
/* 0x0308, */ 0x0000000000000000UL,
|
||||
/* 0x0310, */ 0x0000000000000000UL,
|
||||
/* 0x0318, */ 0x0000000000000000UL,
|
||||
/* 0x0320, */ 0x0000000000000000UL,
|
||||
/* 0x0328, */ 0x0000000000000000UL,
|
||||
/* 0x0330, */ 0x0000000000000000UL,
|
||||
/* 0x0338, */ 0x0000000000000000UL,
|
||||
/* 0x0340, */ 0x0000000000000000UL,
|
||||
/* 0x0348, */ 0x0000000000000000UL,
|
||||
/* 0x0350, */ 0x0000000000000000UL,
|
||||
/* 0x0358, */ 0x0000000000000000UL,
|
||||
/* 0x0360, */ 0x0000000000000000UL,
|
||||
/* 0x0368, */ 0x0000000000000000UL,
|
||||
/* 0x0370, */ 0x000C04040000FFFFUL,
|
||||
/* 0x0378, */ 0x000C04040000FFFFUL,
|
||||
/* 0x0380, */ 0x000C04110000FFFFUL,
|
||||
/* 0x0388, */ 0x000C04110000FFFFUL,
|
||||
/* 0x0390, */ 0x0000000000000000UL,
|
||||
};
|
||||
|
||||
static uint64_t mstat_be[] = {
|
||||
/* 0x0000, */ 0x0000000000000000UL,
|
||||
/* 0x0008, */ 0x0000000000000000UL,
|
||||
/* 0x0010, */ 0x0000000000000000UL,
|
||||
/* 0x0018, */ 0x0000000000000000UL,
|
||||
/* 0x0020, */ 0x0000000000000000UL,
|
||||
/* 0x0028, */ 0x0012001002F03401UL,
|
||||
/* 0x0030, */ 0x0000000000000000UL,
|
||||
/* 0x0038, */ 0x0000000000000000UL,
|
||||
/* 0x0040, */ 0x0000000000000000UL,
|
||||
/* 0x0048, */ 0x0000000000000000UL,
|
||||
/* 0x0050, */ 0x0000000000000000UL,
|
||||
/* 0x0058, */ 0x0000000000000000UL,
|
||||
/* 0x0060, */ 0x0000000000000000UL,
|
||||
/* 0x0068, */ 0x0000000000000000UL,
|
||||
/* 0x0070, */ 0x0000000000000000UL,
|
||||
/* 0x0078, */ 0x0000000000000000UL,
|
||||
/* 0x0080, */ 0x0000000000000000UL,
|
||||
/* 0x0088, */ 0x0000000000000000UL,
|
||||
/* 0x0090, */ 0x0000000000000000UL,
|
||||
/* 0x0098, */ 0x0000000000000000UL,
|
||||
/* 0x00a0, */ 0x0000000000000000UL,
|
||||
/* 0x00a8, */ 0x0000000000000000UL,
|
||||
/* 0x00b0, */ 0x0000000000000000UL,
|
||||
/* 0x00b8, */ 0x0000000000000000UL,
|
||||
/* 0x00c0, */ 0x0000000000000000UL,
|
||||
/* 0x00c8, */ 0x0000000000000000UL,
|
||||
/* 0x00d0, */ 0x0000000000000000UL,
|
||||
/* 0x00d8, */ 0x0000000000000000UL,
|
||||
/* 0x00e0, */ 0x0000000000000000UL,
|
||||
/* 0x00e8, */ 0x0000000000000000UL,
|
||||
/* 0x00f0, */ 0x0000000000000000UL,
|
||||
/* 0x00f8, */ 0x0000000000000000UL,
|
||||
/* 0x0100, */ 0x0000000000000000UL,
|
||||
/* 0x0108, */ 0x0000000000000000UL,
|
||||
/* 0x0110, */ 0x0000000000000000UL,
|
||||
/* 0x0118, */ 0x0000000000000000UL,
|
||||
/* 0x0120, */ 0x0000000000000000UL,
|
||||
/* 0x0128, */ 0x0000000000000000UL,
|
||||
/* 0x0130, */ 0x0000000000000000UL,
|
||||
/* 0x0138, */ 0x0000000000000000UL,
|
||||
/* 0x0140, */ 0x0000000000000000UL,
|
||||
/* 0x0148, */ 0x0000000000000000UL,
|
||||
/* 0x0150, */ 0x0000000000000000UL,
|
||||
/* 0x0158, */ 0x0000000000000000UL,
|
||||
/* 0x0160, */ 0x0000000000000000UL,
|
||||
/* 0x0168, */ 0x0000000000000000UL,
|
||||
/* 0x0170, */ 0x0000000000000000UL,
|
||||
/* 0x0178, */ 0x0000000000000000UL,
|
||||
/* 0x0180, */ 0x0000000000000000UL,
|
||||
/* 0x0188, */ 0x0000000000000000UL,
|
||||
/* 0x0190, */ 0x0000000000000000UL,
|
||||
/* 0x0198, */ 0x0000000000000000UL,
|
||||
/* 0x01a0, */ 0x0000000000000000UL,
|
||||
/* 0x01a8, */ 0x0000000000000000UL,
|
||||
/* 0x01b0, */ 0x0000000000000000UL,
|
||||
/* 0x01b8, */ 0x0000000000000000UL,
|
||||
/* 0x01c0, */ 0x0021060002FFFC01UL,
|
||||
/* 0x01c8, */ 0x0021060002FFFC01UL,
|
||||
/* 0x01d0, */ 0x0000000000000000UL,
|
||||
/* 0x01d8, */ 0x0000000000000000UL,
|
||||
/* 0x01e0, */ 0x0000000000000000UL,
|
||||
/* 0x01e8, */ 0x0000000000000000UL,
|
||||
/* 0x01f0, */ 0x0021010002F3CC01UL,
|
||||
/* 0x01f8, */ 0x0000000000000000UL,
|
||||
/* 0x0200, */ 0x0000000000000000UL,
|
||||
/* 0x0208, */ 0x0000000000000000UL,
|
||||
/* 0x0210, */ 0x0021010002F3CC01UL,
|
||||
/* 0x0218, */ 0x0011010002F3CC01UL,
|
||||
/* 0x0220, */ 0x0011010002F3CC01UL,
|
||||
/* 0x0228, */ 0x0000000000000000UL,
|
||||
/* 0x0230, */ 0x0011010002F3CC01UL,
|
||||
/* 0x0238, */ 0x0011010002F3CC01UL,
|
||||
/* 0x0240, */ 0x0012010002F3CC01UL,
|
||||
/* 0x0248, */ 0x0011010002F3CC01UL,
|
||||
/* 0x0250, */ 0x0012010002F3CC01UL,
|
||||
/* 0x0258, */ 0x0011010002F3CC01UL,
|
||||
/* 0x0260, */ 0x0000000000000000UL,
|
||||
/* 0x0268, */ 0x0000000000000000UL,
|
||||
/* 0x0270, */ 0x0000000000000000UL,
|
||||
/* 0x0278, */ 0x0000000000000000UL,
|
||||
/* 0x0280, */ 0x0000000000000000UL,
|
||||
/* 0x0288, */ 0x0000000000000000UL,
|
||||
/* 0x0290, */ 0x0000000000000000UL,
|
||||
/* 0x0298, */ 0x0000000000000000UL,
|
||||
/* 0x02a0, */ 0x0000000000000000UL,
|
||||
/* 0x02a8, */ 0x0000000000000000UL,
|
||||
/* 0x02b0, */ 0x0000000000000000UL,
|
||||
/* 0x02b8, */ 0x0000000000000000UL,
|
||||
/* 0x02c0, */ 0x0000000000000000UL,
|
||||
/* 0x02c8, */ 0x0000000000000000UL,
|
||||
/* 0x02d0, */ 0x0000000000000000UL,
|
||||
/* 0x02d8, */ 0x0000000000000000UL,
|
||||
/* 0x02e0, */ 0x0000000000000000UL,
|
||||
/* 0x02e8, */ 0x0000000000000000UL,
|
||||
/* 0x02f0, */ 0x0011060002FFFC01UL,
|
||||
/* 0x02f8, */ 0x0011060002FFFC01UL,
|
||||
/* 0x0300, */ 0x0000000000000000UL,
|
||||
/* 0x0308, */ 0x0000000000000000UL,
|
||||
/* 0x0310, */ 0x0000000000000000UL,
|
||||
/* 0x0318, */ 0x0012001002F03401UL,
|
||||
/* 0x0320, */ 0x0000000000000000UL,
|
||||
/* 0x0328, */ 0x0000000000000000UL,
|
||||
/* 0x0330, */ 0x0000000000000000UL,
|
||||
/* 0x0338, */ 0x0000000000000000UL,
|
||||
/* 0x0340, */ 0x0000000000000000UL,
|
||||
/* 0x0348, */ 0x0000000000000000UL,
|
||||
/* 0x0350, */ 0x0000000000000000UL,
|
||||
/* 0x0358, */ 0x0012060002FFFC01UL,
|
||||
/* 0x0360, */ 0x0012060002FFFC01UL,
|
||||
/* 0x0368, */ 0x0012001002F03401UL,
|
||||
/* 0x0370, */ 0x0000000000000000UL,
|
||||
/* 0x0378, */ 0x0000000000000000UL,
|
||||
/* 0x0380, */ 0x0000000000000000UL,
|
||||
/* 0x0388, */ 0x0000000000000000UL,
|
||||
/* 0x0390, */ 0x0012001002F03401UL,
|
||||
};
|
||||
|
||||
#endif /* QOS_INIT_G2E_V10_MSTAT780_H */
|
||||
|
|
@ -5,6 +5,7 @@
|
|||
#
|
||||
|
||||
ifeq (${RCAR_LSI},${RCAR_AUTO})
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/G2H/qos_init_g2h_v30.c
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v10.c
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/G2M/qos_init_g2m_v11.c
|
||||
|
|
@ -22,6 +23,9 @@ else ifeq (${RCAR_LSI_CUT_COMPAT},1)
|
|||
ifeq (${RCAR_LSI},${RZ_G2N})
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10.c
|
||||
endif
|
||||
ifeq (${RCAR_LSI},${RZ_G2E})
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
|
||||
endif
|
||||
else
|
||||
ifeq (${RCAR_LSI},${RZ_G2M})
|
||||
ifeq (${LSI_CUT},10)
|
||||
|
|
@ -48,6 +52,9 @@ else
|
|||
BL2_SOURCES += drivers/renesas/rzg/qos/G2N/qos_init_g2n_v10.c
|
||||
endif
|
||||
endif
|
||||
ifeq (${RCAR_LSI},${RZ_G2E})
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/G2E/qos_init_g2e_v10.c
|
||||
endif
|
||||
endif
|
||||
|
||||
BL2_SOURCES += drivers/renesas/rzg/qos/qos_init.c
|
||||
|
|
|
|||
|
|
@ -63,6 +63,18 @@
|
|||
((SUB_SLOT_CYCLE_G2H * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
|
||||
#endif
|
||||
|
||||
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2E)
|
||||
/* define used for G2E */
|
||||
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 3.9usec */
|
||||
#define SUB_SLOT_CYCLE_G2E 0xAFU /* 175 */
|
||||
#else /* REF 7.8usec */
|
||||
#define SUB_SLOT_CYCLE_G2E 0x15EU /* 350 */
|
||||
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
|
||||
|
||||
#define OPERATING_FREQ_G2E 266U /* MHz */
|
||||
#define SL_INIT_SSLOTCLK_G2E (SUB_SLOT_CYCLE_G2E - 1U)
|
||||
#endif
|
||||
|
||||
#define OPERATING_FREQ 400U /* MHz */
|
||||
#define BASE_SUB_SLOT_NUM 0x6U
|
||||
#define SUB_SLOT_CYCLE 0x7EU /* 126 */
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
#include <lib/mmio.h>
|
||||
|
||||
#if RCAR_LSI == RCAR_AUTO
|
||||
#include "G2E/qos_init_g2e_v10.h"
|
||||
#include "G2H/qos_init_g2h_v30.h"
|
||||
#include "G2M/qos_init_g2m_v10.h"
|
||||
#include "G2M/qos_init_g2m_v11.h"
|
||||
|
|
@ -27,14 +28,19 @@
|
|||
#if RCAR_LSI == RZ_G2N
|
||||
#include "G2N/qos_init_g2n_v10.h"
|
||||
#endif /* RCAR_LSI == RZ_G2N */
|
||||
#if RCAR_LSI == RZ_G2E
|
||||
#include "G2E/qos_init_g2e_v10.h"
|
||||
#endif /* RCAR_LSI == RZ_G2E */
|
||||
#include "qos_common.h"
|
||||
#include "qos_init.h"
|
||||
#include "qos_reg.h"
|
||||
#include "rcar_def.h"
|
||||
|
||||
#if (RCAR_LSI != RZ_G2E)
|
||||
#define DRAM_CH_CNT 0x04U
|
||||
uint32_t qos_init_ddr_ch;
|
||||
uint8_t qos_init_ddr_phyvalid;
|
||||
#endif /* RCAR_LSI != RZ_G2E */
|
||||
|
||||
#define PRR_PRODUCT_ERR(reg) \
|
||||
{ \
|
||||
|
|
@ -53,6 +59,7 @@ uint8_t qos_init_ddr_phyvalid;
|
|||
void rzg_qos_init(void)
|
||||
{
|
||||
uint32_t reg;
|
||||
#if (RCAR_LSI != RZ_G2E)
|
||||
uint32_t i;
|
||||
|
||||
qos_init_ddr_ch = 0U;
|
||||
|
|
@ -62,6 +69,7 @@ void rzg_qos_init(void)
|
|||
qos_init_ddr_ch++;
|
||||
}
|
||||
}
|
||||
#endif /* RCAR_LSI != RZ_G2E */
|
||||
|
||||
reg = mmio_read_32(PRR);
|
||||
#if (RCAR_LSI == RCAR_AUTO) || RCAR_LSI_CUT_COMPAT
|
||||
|
|
@ -108,6 +116,18 @@ void rzg_qos_init(void)
|
|||
PRR_PRODUCT_ERR(reg);
|
||||
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N) */
|
||||
break;
|
||||
case PRR_PRODUCT_E3:
|
||||
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2E)
|
||||
switch (reg & PRR_CUT_MASK) {
|
||||
case PRR_PRODUCT_10:
|
||||
default:
|
||||
qos_init_g2e_v10();
|
||||
break;
|
||||
}
|
||||
#else
|
||||
PRR_PRODUCT_ERR(reg);
|
||||
#endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2E) */
|
||||
break;
|
||||
default:
|
||||
PRR_PRODUCT_ERR(reg);
|
||||
break;
|
||||
|
|
@ -155,12 +175,19 @@ void rzg_qos_init(void)
|
|||
PRR_PRODUCT_ERR(reg);
|
||||
}
|
||||
qos_init_g2n_v10();
|
||||
#elif RCAR_LSI == RZ_G2E
|
||||
/* G2E Cut 10 or later */
|
||||
if ((reg & (PRR_PRODUCT_MASK)) != PRR_PRODUCT_E3) {
|
||||
PRR_PRODUCT_ERR(reg);
|
||||
}
|
||||
qos_init_g2e_v10();
|
||||
#else /* (RCAR_LSI == RZ_G2M) */
|
||||
#error "Don't have QoS initialize routine(Unknown chip)."
|
||||
#endif /* (RCAR_LSI == RZ_G2M) */
|
||||
#endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */
|
||||
}
|
||||
|
||||
#if (RCAR_LSI != RZ_G2E)
|
||||
uint32_t get_refperiod(void)
|
||||
{
|
||||
uint32_t refperiod = QOSWT_WTSET0_CYCLE;
|
||||
|
|
@ -217,6 +244,7 @@ uint32_t get_refperiod(void)
|
|||
#endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */
|
||||
return refperiod;
|
||||
}
|
||||
#endif /* RCAR_LSI != RZ_G2E */
|
||||
|
||||
void rzg_qos_dbsc_setting(const struct rcar_gen3_dbsc_qos_settings *qos,
|
||||
unsigned int qos_size, bool dbsc_wren)
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue