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services/spm_deprecated: update ARM platform specific asserts
Update some asserts that refer to #defines that only occur in ARM platforms, preventing this code to be used on other platforms. Instead, use a platform agnostic name, and update all the existing users. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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parent
c871903260
commit
0560efb93e
7 changed files with 21 additions and 21 deletions
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@ -88,12 +88,12 @@
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* requests. Mapped as RW and NS. Placed after the shared memory between EL3 and
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* S-EL0.
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*/
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#define ARM_SP_IMAGE_NS_BUF_BASE (PLAT_SPM_BUF_BASE + PLAT_SPM_BUF_SIZE)
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#define ARM_SP_IMAGE_NS_BUF_SIZE ULL(0x10000)
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#define PLAT_SP_IMAGE_NS_BUF_BASE (PLAT_SPM_BUF_BASE + PLAT_SPM_BUF_SIZE)
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#define PLAT_SP_IMAGE_NS_BUF_SIZE ULL(0x10000)
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#define ARM_SP_IMAGE_NS_BUF_MMAP MAP_REGION2( \
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ARM_SP_IMAGE_NS_BUF_BASE, \
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ARM_SP_IMAGE_NS_BUF_BASE, \
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ARM_SP_IMAGE_NS_BUF_SIZE, \
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PLAT_SP_IMAGE_NS_BUF_BASE, \
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PLAT_SP_IMAGE_NS_BUF_BASE, \
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PLAT_SP_IMAGE_NS_BUF_SIZE, \
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MT_RW_DATA | MT_NS | MT_USER, \
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PAGE_SIZE)
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@ -46,8 +46,8 @@ typedef struct arm_tzc_regions_info {
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PLAT_ARM_TZC_NS_DEV_ACCESS}, \
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{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
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PLAT_ARM_TZC_NS_DEV_ACCESS}, \
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{ARM_SP_IMAGE_NS_BUF_BASE, (ARM_SP_IMAGE_NS_BUF_BASE + \
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ARM_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE, \
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{PLAT_SP_IMAGE_NS_BUF_BASE, (PLAT_SP_IMAGE_NS_BUF_BASE + \
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PLAT_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE, \
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PLAT_ARM_TZC_NS_DEV_ACCESS}
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#else
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@ -218,12 +218,12 @@ const secure_partition_boot_info_t plat_arm_secure_partition_boot_info = {
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.sp_image_base = ARM_SP_IMAGE_BASE,
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.sp_stack_base = PLAT_SP_IMAGE_STACK_BASE,
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.sp_heap_base = ARM_SP_IMAGE_HEAP_BASE,
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.sp_ns_comm_buf_base = ARM_SP_IMAGE_NS_BUF_BASE,
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.sp_ns_comm_buf_base = PLAT_SP_IMAGE_NS_BUF_BASE,
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.sp_shared_buf_base = PLAT_SPM_BUF_BASE,
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.sp_image_size = ARM_SP_IMAGE_SIZE,
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.sp_pcpu_stack_size = PLAT_SP_IMAGE_STACK_PCPU_SIZE,
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.sp_heap_size = ARM_SP_IMAGE_HEAP_SIZE,
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.sp_ns_comm_buf_size = ARM_SP_IMAGE_NS_BUF_SIZE,
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.sp_ns_comm_buf_size = PLAT_SP_IMAGE_NS_BUF_SIZE,
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.sp_shared_buf_size = PLAT_SPM_BUF_SIZE,
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.num_sp_mem_regions = ARM_SP_IMAGE_NUM_MEM_REGIONS,
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.num_cpus = PLATFORM_CORE_COUNT,
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@ -271,8 +271,8 @@
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#define PLAT_ARM_PRIVATE_SDEI_EVENTS ARM_SDEI_PRIVATE_EVENTS
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#define PLAT_ARM_SHARED_SDEI_EVENTS ARM_SDEI_SHARED_EVENTS
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#define PLAT_ARM_SP_IMAGE_STACK_BASE (ARM_SP_IMAGE_NS_BUF_BASE + \
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ARM_SP_IMAGE_NS_BUF_SIZE)
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#define PLAT_ARM_SP_IMAGE_STACK_BASE (PLAT_SP_IMAGE_NS_BUF_BASE + \
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PLAT_SP_IMAGE_NS_BUF_SIZE)
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#define PLAT_SP_PRI PLAT_RAS_PRI
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@ -147,8 +147,8 @@
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/* Allocate 128KB for CPER buffers */
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#define PLAT_SP_BUF_BASE ULL(0x20000)
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#define PLAT_ARM_SP_IMAGE_STACK_BASE (ARM_SP_IMAGE_NS_BUF_BASE + \
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ARM_SP_IMAGE_NS_BUF_SIZE + \
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#define PLAT_ARM_SP_IMAGE_STACK_BASE (PLAT_SP_IMAGE_NS_BUF_BASE + \
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PLAT_SP_IMAGE_NS_BUF_SIZE + \
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PLAT_SP_BUF_BASE)
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/* Platform specific SMC FID's used for RAS */
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@ -171,8 +171,8 @@
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SDEI_EXPLICIT_EVENT(SGI_SDEI_DS_EVENT_1, SDEI_MAPF_CRITICAL),
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#define PLAT_ARM_SHARED_SDEI_EVENTS
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#define ARM_SP_CPER_BUF_BASE (ARM_SP_IMAGE_NS_BUF_BASE + \
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ARM_SP_IMAGE_NS_BUF_SIZE)
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#define ARM_SP_CPER_BUF_BASE (PLAT_SP_IMAGE_NS_BUF_BASE + \
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PLAT_SP_IMAGE_NS_BUF_SIZE)
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#define ARM_SP_CPER_BUF_SIZE ULL(0x20000)
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#define ARM_SP_CPER_BUF_MMAP MAP_REGION2( \
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ARM_SP_CPER_BUF_BASE, \
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@ -182,8 +182,8 @@
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PAGE_SIZE)
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#else
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#define PLAT_ARM_SP_IMAGE_STACK_BASE (ARM_SP_IMAGE_NS_BUF_BASE + \
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ARM_SP_IMAGE_NS_BUF_SIZE)
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#define PLAT_ARM_SP_IMAGE_STACK_BASE (PLAT_SP_IMAGE_NS_BUF_BASE + \
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PLAT_SP_IMAGE_NS_BUF_SIZE)
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#endif /* RAS_EXTENSION */
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/* Platform ID address */
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@ -127,12 +127,12 @@ const secure_partition_boot_info_t plat_arm_secure_partition_boot_info = {
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.sp_image_base = ARM_SP_IMAGE_BASE,
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.sp_stack_base = PLAT_SP_IMAGE_STACK_BASE,
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.sp_heap_base = ARM_SP_IMAGE_HEAP_BASE,
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.sp_ns_comm_buf_base = ARM_SP_IMAGE_NS_BUF_BASE,
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.sp_ns_comm_buf_base = PLAT_SP_IMAGE_NS_BUF_BASE,
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.sp_shared_buf_base = PLAT_SPM_BUF_BASE,
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.sp_image_size = ARM_SP_IMAGE_SIZE,
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.sp_pcpu_stack_size = PLAT_SP_IMAGE_STACK_PCPU_SIZE,
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.sp_heap_size = ARM_SP_IMAGE_HEAP_SIZE,
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.sp_ns_comm_buf_size = ARM_SP_IMAGE_NS_BUF_SIZE,
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.sp_ns_comm_buf_size = PLAT_SP_IMAGE_NS_BUF_SIZE,
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.sp_shared_buf_size = PLAT_SPM_BUF_SIZE,
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.num_sp_mem_regions = ARM_SP_IMAGE_NUM_MEM_REGIONS,
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.num_cpus = PLATFORM_CORE_COUNT,
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@ -84,10 +84,10 @@ void spm_sp_setup(sp_context_t *sp_ctx)
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unsigned int max_granule_mask = max_granule - 1U;
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/* Base must be aligned to the max granularity */
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assert((ARM_SP_IMAGE_NS_BUF_BASE & max_granule_mask) == 0);
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assert((PLAT_SP_IMAGE_NS_BUF_BASE & max_granule_mask) == 0);
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/* Size must be a multiple of the max granularity */
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assert((ARM_SP_IMAGE_NS_BUF_SIZE & max_granule_mask) == 0);
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assert((PLAT_SP_IMAGE_NS_BUF_SIZE & max_granule_mask) == 0);
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#endif /* ENABLE_ASSERTIONS */
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