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https://github.com/ARM-software/arm-trusted-firmware.git
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Rename GICv3 interrupt group macros
This patch renames the GICv3 interrupt group macros from INT_TYPE_G0, INT_TYPE_G1S and INT_TYPE_G1NS to INTR_GROUP0, INTR_GROUP1S and INTR_GROUP1NS respectively. Change-Id: I40c66f589ce6234fa42205adcd91f7d6ad8f33d4
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f3974ea5b1
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03ffb6bdef
3 changed files with 18 additions and 18 deletions
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@ -312,7 +312,7 @@ void gicv3_secure_spis_configure(uintptr_t gicd_base,
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unsigned int index, irq_num;
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uint64_t gic_affinity_val;
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assert((int_grp == INT_TYPE_G1S) || (int_grp == INT_TYPE_G0));
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assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0));
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/* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */
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assert(num_ints ? (uintptr_t)sec_intr_list : 1);
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@ -324,7 +324,7 @@ void gicv3_secure_spis_configure(uintptr_t gicd_base,
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gicd_clr_igroupr(gicd_base, irq_num);
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/* Configure this interrupt as G0 or a G1S interrupt */
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if (int_grp == INT_TYPE_G1S)
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if (int_grp == INTR_GROUP1S)
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gicd_set_igrpmodr(gicd_base, irq_num);
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else
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gicd_clr_igrpmodr(gicd_base, irq_num);
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@ -386,7 +386,7 @@ void gicv3_secure_ppi_sgi_configure(uintptr_t gicr_base,
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{
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unsigned int index, irq_num;
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assert((int_grp == INT_TYPE_G1S) || (int_grp == INT_TYPE_G0));
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assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0));
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/* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */
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assert(num_ints ? (uintptr_t)sec_intr_list : 1);
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@ -398,7 +398,7 @@ void gicv3_secure_ppi_sgi_configure(uintptr_t gicr_base,
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gicr_clr_igroupr0(gicr_base, irq_num);
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/* Configure this interrupt as G0 or a G1S interrupt */
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if (int_grp == INT_TYPE_G1S)
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if (int_grp == INTR_GROUP1S)
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gicr_set_igrpmodr0(gicr_base, irq_num);
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else
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gicr_clr_igrpmodr0(gicr_base, irq_num);
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@ -144,13 +144,13 @@ void gicv3_distif_init(void)
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gicv3_secure_spis_configure(driver_data->gicd_base,
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driver_data->g1s_interrupt_num,
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driver_data->g1s_interrupt_array,
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INT_TYPE_G1S);
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INTR_GROUP1S);
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/* Configure the G0 SPIs */
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gicv3_secure_spis_configure(driver_data->gicd_base,
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driver_data->g0_interrupt_num,
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driver_data->g0_interrupt_array,
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INT_TYPE_G0);
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INTR_GROUP0);
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/* Enable the secure SPIs now that they have been configured */
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gicd_set_ctlr(driver_data->gicd_base,
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@ -186,13 +186,13 @@ void gicv3_rdistif_init(unsigned int proc_num)
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gicv3_secure_ppi_sgi_configure(gicr_base,
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driver_data->g1s_interrupt_num,
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driver_data->g1s_interrupt_array,
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INT_TYPE_G1S);
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INTR_GROUP1S);
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/* Configure the G0 SGIs/PPIs */
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gicv3_secure_ppi_sgi_configure(gicr_base,
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driver_data->g0_interrupt_num,
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driver_data->g0_interrupt_array,
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INT_TYPE_G0);
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INTR_GROUP0);
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}
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/*******************************************************************************
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@ -332,9 +332,9 @@ unsigned int gicv3_get_pending_interrupt_type(void)
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* this interrupt has been configured under by the interrupt controller i.e.
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* group0 or group1 Secure / Non Secure. The return value can be one of the
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* following :
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* INT_TYPE_G0 : The interrupt type is a Secure Group 0 interrupt
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* INT_TYPE_G1S : The interrupt type is a Secure Group 1 secure interrupt
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* INT_TYPE_G1NS: The interrupt type is a Secure Group 1 non secure
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* INTR_GROUP0 : The interrupt type is a Secure Group 0 interrupt
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* INTR_GROUP1S : The interrupt type is a Secure Group 1 secure interrupt
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* INTR_GROUP1NS: The interrupt type is a Secure Group 1 non secure
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* interrupt.
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******************************************************************************/
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unsigned int gicv3_get_interrupt_type(unsigned int id,
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@ -352,7 +352,7 @@ unsigned int gicv3_get_interrupt_type(unsigned int id,
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/* All LPI interrupts are Group 1 non secure */
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if (id >= MIN_LPI_ID)
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return INT_TYPE_G1NS;
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return INTR_GROUP1NS;
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if (id < MIN_SPI_ID) {
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assert(driver_data->rdistif_base_addrs);
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@ -370,12 +370,12 @@ unsigned int gicv3_get_interrupt_type(unsigned int id,
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* interrupt
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*/
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if (igroup)
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return INT_TYPE_G1NS;
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return INTR_GROUP1NS;
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/* If the GRPMOD bit is set, then it is a Group 1 Secure interrupt */
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if (grpmodr)
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return INT_TYPE_G1S;
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return INTR_GROUP1S;
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/* Else it is a Group 0 Secure interrupt */
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return INT_TYPE_G0;
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return INTR_GROUP0;
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}
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@ -35,9 +35,9 @@
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* GICv3 miscellaneous definitions
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******************************************************************************/
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/* Interrupt group definitions */
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#define INT_TYPE_G1S 0
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#define INT_TYPE_G0 1
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#define INT_TYPE_G1NS 2
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#define INTR_GROUP1S 0
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#define INTR_GROUP0 1
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#define INTR_GROUP1NS 2
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/* Interrupt IDs reported by the HPPIR and IAR registers */
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#define PENDING_G1S_INTID 1020
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