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EHF: MISRA fixes
These changes address most of the required MISRA rules. In the process, some from generic code are also fixed. No functional changes. Change-Id: I19786070af7bc5e1f6d15bdba93e22a4451d8fe9 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
This commit is contained in:
Jeenu Viswambharan
parent
611eb9cfa7
commit
03b645ed86
4 changed files with 76 additions and 66 deletions
100
bl31/ehf.c
100
bl31/ehf.c
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@ -18,6 +18,7 @@
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#include <interrupt_mgmt.h>
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#include <platform.h>
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#include <pubsub_events.h>
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#include <stdbool.h>
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/* Output EHF logs as verbose */
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#define EHF_LOG(...) VERBOSE("EHF: " __VA_ARGS__)
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@ -26,43 +27,44 @@
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/* For a valid handler, return the actual function pointer; otherwise, 0. */
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#define RAW_HANDLER(h) \
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((ehf_handler_t) ((h & _EHF_PRI_VALID) ? (h & ~_EHF_PRI_VALID) : 0))
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((ehf_handler_t) ((((h) & EHF_PRI_VALID_) != 0U) ? \
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((h) & ~EHF_PRI_VALID_) : 0U))
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#define PRI_BIT(idx) (((ehf_pri_bits_t) 1) << idx)
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#define PRI_BIT(idx) (((ehf_pri_bits_t) 1u) << (idx))
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/*
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* Convert index into secure priority using the platform-defined priority bits
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* field.
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*/
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#define IDX_TO_PRI(idx) \
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((idx << (7 - exception_data.pri_bits)) & 0x7f)
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((((unsigned) idx) << (7u - exception_data.pri_bits)) & 0x7fU)
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/* Check whether a given index is valid */
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#define IS_IDX_VALID(idx) \
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((exception_data.ehf_priorities[idx].ehf_handler & _EHF_PRI_VALID) != 0)
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((exception_data.ehf_priorities[idx].ehf_handler & EHF_PRI_VALID_) != 0U)
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/* Returns whether given priority is in secure priority range */
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#define IS_PRI_SECURE(pri) ((pri & 0x80) == 0)
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#define IS_PRI_SECURE(pri) (((pri) & 0x80U) == 0U)
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/* To be defined by the platform */
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extern const ehf_priorities_t exception_data;
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/* Translate priority to the index in the priority array */
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static int pri_to_idx(unsigned int priority)
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static unsigned int pri_to_idx(unsigned int priority)
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{
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int idx;
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unsigned int idx;
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idx = EHF_PRI_TO_IDX(priority, exception_data.pri_bits);
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assert((idx >= 0) && (idx < exception_data.num_priorities));
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assert(idx < exception_data.num_priorities);
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assert(IS_IDX_VALID(idx));
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return idx;
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}
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/* Return whether there are outstanding priority activation */
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static int has_valid_pri_activations(pe_exc_data_t *pe_data)
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static bool has_valid_pri_activations(pe_exc_data_t *pe_data)
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{
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return pe_data->active_pri_bits != 0;
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return pe_data->active_pri_bits != 0U;
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}
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static pe_exc_data_t *this_cpu_data(void)
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@ -80,7 +82,7 @@ static int get_pe_highest_active_idx(pe_exc_data_t *pe_data)
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return EHF_INVALID_IDX;
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/* Current priority is the right-most bit */
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return __builtin_ctz(pe_data->active_pri_bits);
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return (int) __builtin_ctz(pe_data->active_pri_bits);
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}
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/*
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@ -95,8 +97,8 @@ static int get_pe_highest_active_idx(pe_exc_data_t *pe_data)
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*/
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void ehf_activate_priority(unsigned int priority)
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{
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int idx, cur_pri_idx;
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unsigned int old_mask, run_pri;
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int cur_pri_idx;
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unsigned int old_mask, run_pri, idx;
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pe_exc_data_t *pe_data = this_cpu_data();
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/*
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@ -118,7 +120,8 @@ void ehf_activate_priority(unsigned int priority)
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*/
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cur_pri_idx = get_pe_highest_active_idx(pe_data);
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idx = pri_to_idx(priority);
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if ((cur_pri_idx != EHF_INVALID_IDX) && (idx >= cur_pri_idx)) {
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if ((cur_pri_idx != EHF_INVALID_IDX) &&
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(idx >= ((unsigned int) cur_pri_idx))) {
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ERROR("Activation priority mismatch: req=0x%x current=0x%x\n",
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priority, IDX_TO_PRI(cur_pri_idx));
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panic();
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@ -144,7 +147,7 @@ void ehf_activate_priority(unsigned int priority)
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* restored after the last deactivation.
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*/
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if (cur_pri_idx == EHF_INVALID_IDX)
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pe_data->init_pri_mask = old_mask;
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pe_data->init_pri_mask = (uint8_t) old_mask;
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EHF_LOG("activate prio=%d\n", get_pe_highest_active_idx(pe_data));
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}
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@ -161,9 +164,9 @@ void ehf_activate_priority(unsigned int priority)
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*/
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void ehf_deactivate_priority(unsigned int priority)
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{
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int idx, cur_pri_idx;
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int cur_pri_idx;
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pe_exc_data_t *pe_data = this_cpu_data();
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unsigned int old_mask, run_pri;
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unsigned int old_mask, run_pri, idx;
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/*
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* Query interrupt controller for the running priority, or idle priority
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@ -184,21 +187,22 @@ void ehf_deactivate_priority(unsigned int priority)
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*/
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cur_pri_idx = get_pe_highest_active_idx(pe_data);
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idx = pri_to_idx(priority);
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if ((cur_pri_idx == EHF_INVALID_IDX) || (idx != cur_pri_idx)) {
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if ((cur_pri_idx == EHF_INVALID_IDX) ||
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(idx != ((unsigned int) cur_pri_idx))) {
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ERROR("Deactivation priority mismatch: req=0x%x current=0x%x\n",
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priority, IDX_TO_PRI(cur_pri_idx));
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panic();
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}
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/* Clear bit corresponding to highest priority */
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pe_data->active_pri_bits &= (pe_data->active_pri_bits - 1);
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pe_data->active_pri_bits &= (pe_data->active_pri_bits - 1u);
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/*
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* Restore priority mask corresponding to the next priority, or the
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* one stashed earlier if there are no more to deactivate.
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*/
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idx = get_pe_highest_active_idx(pe_data);
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if (idx == EHF_INVALID_IDX)
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cur_pri_idx = get_pe_highest_active_idx(pe_data);
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if (cur_pri_idx == EHF_INVALID_IDX)
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old_mask = plat_ic_set_priority_mask(pe_data->init_pri_mask);
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else
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old_mask = plat_ic_set_priority_mask(priority);
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@ -231,16 +235,16 @@ static void *ehf_exited_normal_world(const void *arg)
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/* If the running priority is in the secure range, do nothing */
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run_pri = plat_ic_get_running_priority();
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if (IS_PRI_SECURE(run_pri))
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return 0;
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return NULL;
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/* Do nothing if there are explicit activations */
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if (has_valid_pri_activations(pe_data))
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return 0;
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return NULL;
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assert(pe_data->ns_pri_mask == 0);
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assert(pe_data->ns_pri_mask == 0u);
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pe_data->ns_pri_mask =
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plat_ic_set_priority_mask(GIC_HIGHEST_NS_PRIORITY);
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(uint8_t) plat_ic_set_priority_mask(GIC_HIGHEST_NS_PRIORITY);
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/* The previous Priority Mask is not expected to be in secure range */
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if (IS_PRI_SECURE(pe_data->ns_pri_mask)) {
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@ -252,7 +256,7 @@ static void *ehf_exited_normal_world(const void *arg)
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EHF_LOG("Priority Mask: 0x%x => 0x%x\n", pe_data->ns_pri_mask,
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GIC_HIGHEST_NS_PRIORITY);
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return 0;
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return NULL;
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}
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/*
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@ -274,18 +278,18 @@ static void *ehf_entering_normal_world(const void *arg)
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/* If the running priority is in the secure range, do nothing */
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run_pri = plat_ic_get_running_priority();
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if (IS_PRI_SECURE(run_pri))
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return 0;
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return NULL;
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/*
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* If there are explicit activations, do nothing. The Priority Mask will
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* be restored upon the last deactivation.
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*/
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if (has_valid_pri_activations(pe_data))
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return 0;
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return NULL;
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/* Do nothing if we don't have a valid Priority Mask to restore */
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if (pe_data->ns_pri_mask == 0)
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return 0;
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if (pe_data->ns_pri_mask == 0U)
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return NULL;
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old_pmr = plat_ic_set_priority_mask(pe_data->ns_pri_mask);
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@ -304,7 +308,7 @@ static void *ehf_entering_normal_world(const void *arg)
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pe_data->ns_pri_mask = 0;
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return 0;
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return NULL;
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}
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/*
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@ -328,7 +332,7 @@ void ehf_allow_ns_preemption(uint64_t preempt_ret_code)
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* We should have been notified earlier of entering secure world, and
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* therefore have stashed the Non-secure priority mask.
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*/
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assert(pe_data->ns_pri_mask != 0);
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assert(pe_data->ns_pri_mask != 0U);
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/* Make sure no priority levels are active when requesting this */
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if (has_valid_pri_activations(pe_data)) {
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@ -343,7 +347,7 @@ void ehf_allow_ns_preemption(uint64_t preempt_ret_code)
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* to populate it, the caller would find the correct return value.
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*/
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ns_ctx = cm_get_context(NON_SECURE);
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assert(ns_ctx);
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assert(ns_ctx != NULL);
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write_ctx_reg(get_gpregs_ctx(ns_ctx), CTX_GPREG_X0, preempt_ret_code);
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old_pmr = plat_ic_set_priority_mask(pe_data->ns_pri_mask);
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@ -376,7 +380,7 @@ unsigned int ehf_is_ns_preemption_allowed(void)
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*/
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if (has_valid_pri_activations(pe_data))
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return 0;
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if (pe_data->ns_pri_mask != 0)
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if (pe_data->ns_pri_mask != 0U)
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return 0;
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return 1;
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@ -388,7 +392,9 @@ unsigned int ehf_is_ns_preemption_allowed(void)
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static uint64_t ehf_el3_interrupt_handler(uint32_t id, uint32_t flags,
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void *handle, void *cookie)
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{
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int pri, idx, intr, intr_raw, ret = 0;
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int ret = 0;
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uint32_t intr_raw;
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unsigned int intr, pri, idx;
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ehf_handler_t handler;
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/*
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@ -425,8 +431,9 @@ static uint64_t ehf_el3_interrupt_handler(uint32_t id, uint32_t flags,
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/* Validate priority */
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assert(pri == IDX_TO_PRI(idx));
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handler = RAW_HANDLER(exception_data.ehf_priorities[idx].ehf_handler);
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if (!handler) {
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handler = (ehf_handler_t) RAW_HANDLER(
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exception_data.ehf_priorities[idx].ehf_handler);
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if (handler == NULL) {
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ERROR("No EL3 exception handler for priority 0x%x\n",
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IDX_TO_PRI(idx));
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panic();
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@ -438,7 +445,7 @@ static uint64_t ehf_el3_interrupt_handler(uint32_t id, uint32_t flags,
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*/
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ret = handler(intr_raw, flags, handle, cookie);
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return ret;
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return (uint64_t) ret;
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}
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/*
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@ -450,21 +457,22 @@ void ehf_init(void)
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int ret __unused;
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/* Ensure EL3 interrupts are supported */
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assert(plat_ic_has_interrupt_type(INTR_TYPE_EL3));
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assert(plat_ic_has_interrupt_type(INTR_TYPE_EL3) != 0);
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/*
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* Make sure that priority water mark has enough bits to represent the
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* whole priority array.
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*/
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assert(exception_data.num_priorities <= (sizeof(ehf_pri_bits_t) * 8));
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assert(exception_data.num_priorities <= (sizeof(ehf_pri_bits_t) * 8U));
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assert(exception_data.ehf_priorities);
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assert(exception_data.ehf_priorities != NULL);
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/*
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* Bit 7 of GIC priority must be 0 for secure interrupts. This means
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* platforms must use at least 1 of the remaining 7 bits.
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*/
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assert((exception_data.pri_bits >= 1) || (exception_data.pri_bits < 8));
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assert((exception_data.pri_bits >= 1U) ||
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(exception_data.pri_bits < 8U));
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/* Route EL3 interrupts when in Secure and Non-secure. */
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set_interrupt_rm_flag(flags, NON_SECURE);
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@ -484,13 +492,13 @@ void ehf_init(void)
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*/
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void ehf_register_priority_handler(unsigned int pri, ehf_handler_t handler)
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{
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int idx;
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unsigned int idx;
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/* Sanity check for handler */
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assert(handler != NULL);
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/* Handler ought to be 4-byte aligned */
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assert((((uintptr_t) handler) & 3) == 0);
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assert((((uintptr_t) handler) & 3U) == 0U);
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/* Ensure we register for valid priority */
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idx = pri_to_idx(pri);
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@ -498,7 +506,7 @@ void ehf_register_priority_handler(unsigned int pri, ehf_handler_t handler)
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assert(IDX_TO_PRI(idx) == pri);
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/* Return failure if a handler was already registered */
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if (exception_data.ehf_priorities[idx].ehf_handler != _EHF_NO_HANDLER) {
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if (exception_data.ehf_priorities[idx].ehf_handler != EHF_NO_HANDLER_) {
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ERROR("Handler already registered for priority 0x%x\n", pri);
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panic();
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}
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@ -508,7 +516,7 @@ void ehf_register_priority_handler(unsigned int pri, ehf_handler_t handler)
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* is 4-byte aligned, which is usually the case.
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*/
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exception_data.ehf_priorities[idx].ehf_handler =
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(((uintptr_t) handler) | _EHF_PRI_VALID);
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(((uintptr_t) handler) | EHF_PRI_VALID_);
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EHF_LOG("register pri=0x%x handler=%p\n", pri, handler);
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}
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@ -4,8 +4,8 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __EHF_H__
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#define __EHF_H__
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#ifndef EHF_H
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#define EHF_H
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#ifndef __ASSEMBLY__
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@ -13,27 +13,27 @@
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#include <utils_def.h>
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/* Valid priorities set bit 0 of the priority handler. */
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#define _EHF_PRI_VALID (((uintptr_t) 1) << 0)
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#define EHF_PRI_VALID_ (((uintptr_t) 1) << 0)
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/* Marker for no handler registered for a valid priority */
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#define _EHF_NO_HANDLER (0 | _EHF_PRI_VALID)
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#define EHF_NO_HANDLER_ (0U | EHF_PRI_VALID_)
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/* Extract the specified number of top bits from 7 lower bits of priority */
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#define EHF_PRI_TO_IDX(pri, plat_bits) \
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((pri & 0x7f) >> (7 - plat_bits))
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((((unsigned) (pri)) & 0x7fu) >> (7u - (plat_bits)))
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/* Install exception priority descriptor at a suitable index */
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#define EHF_PRI_DESC(plat_bits, priority) \
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[EHF_PRI_TO_IDX(priority, plat_bits)] = { \
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.ehf_handler = _EHF_NO_HANDLER, \
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.ehf_handler = EHF_NO_HANDLER_, \
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}
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/* Macro for platforms to regiter its exception priorities */
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#define EHF_REGISTER_PRIORITIES(priorities, num, bits) \
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const ehf_priorities_t exception_data = { \
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.num_priorities = num, \
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.ehf_priorities = priorities, \
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.pri_bits = bits, \
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.num_priorities = (num), \
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.ehf_priorities = (priorities), \
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.pri_bits = (bits), \
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}
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/*
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@ -72,10 +72,10 @@ typedef struct ehf_pri_desc {
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uintptr_t ehf_handler;
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} ehf_pri_desc_t;
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typedef struct ehf_priorities {
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typedef struct ehf_priority_type {
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ehf_pri_desc_t *ehf_priorities;
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unsigned int num_priorities;
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int pri_bits;
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unsigned int pri_bits;
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} ehf_priorities_t;
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void ehf_init(void);
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@ -87,4 +87,4 @@ unsigned int ehf_is_ns_preemption_allowed(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __EHF_H__ */
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#endif /* EHF_H */
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@ -61,10 +61,10 @@
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#define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */
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#define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */
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#define INTR_RM_FROM_FLAG_MASK U(1)
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#define get_interrupt_rm_flag(flag, ss) (((flag >> INTR_RM_FLAGS_SHIFT) >> ss) \
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& INTR_RM_FROM_FLAG_MASK)
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#define set_interrupt_rm_flag(flag, ss) (flag |= U(1) << ss)
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#define clr_interrupt_rm_flag(flag, ss) (flag &= ~(U(1) << ss))
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#define get_interrupt_rm_flag(flag, ss) \
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((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
|
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#define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss))
|
||||
#define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss)))
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
|
|
|
|||
|
|
@ -7,6 +7,8 @@
|
|||
#ifndef __GIC_COMMON_H__
|
||||
#define __GIC_COMMON_H__
|
||||
|
||||
#include <utils_def.h>
|
||||
|
||||
/*******************************************************************************
|
||||
* GIC Distributor interface general definitions
|
||||
******************************************************************************/
|
||||
|
|
@ -34,10 +36,10 @@
|
|||
#define GIC_INTR_CFG_EDGE (1 << 1)
|
||||
|
||||
/* Constants to categorise priorities */
|
||||
#define GIC_HIGHEST_SEC_PRIORITY 0x0
|
||||
#define GIC_LOWEST_SEC_PRIORITY 0x7f
|
||||
#define GIC_HIGHEST_NS_PRIORITY 0x80
|
||||
#define GIC_LOWEST_NS_PRIORITY 0xfe /* 0xff would disable all interrupts */
|
||||
#define GIC_HIGHEST_SEC_PRIORITY U(0x00)
|
||||
#define GIC_LOWEST_SEC_PRIORITY U(0x7f)
|
||||
#define GIC_HIGHEST_NS_PRIORITY U(0x80)
|
||||
#define GIC_LOWEST_NS_PRIORITY U(0xfe) /* 0xff would disable all interrupts */
|
||||
|
||||
/*******************************************************************************
|
||||
* GIC Distributor interface register offsets that are common to GICv3 & GICv2
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue