From 037a15f5c72e856b8739a2159bd0fe1fe69e1d5b Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Fri, 6 Sep 2024 12:26:35 -0500 Subject: [PATCH] fix(security): add CVE-2024-7881 mitigation to Neoverse-V3 This patch mitigates CVE-2024-7881 [1] by setting CPUACTLR6_EL1[41] to 1 for Neoverse-V3 CPU. [1]: https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-7881 Signed-off-by: Arvind Ram Prakash Change-Id: Ib5c644895b8c76d3c7e8b5e6e98d7b9afef7f1ec --- include/lib/cpus/aarch64/neoverse_v3.h | 9 +++++++-- lib/cpus/aarch64/neoverse_v3.S | 13 ++++++++++++- 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/include/lib/cpus/aarch64/neoverse_v3.h b/include/lib/cpus/aarch64/neoverse_v3.h index e5f75ba9b..a31bdd3aa 100644 --- a/include/lib/cpus/aarch64/neoverse_v3.h +++ b/include/lib/cpus/aarch64/neoverse_v3.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2024, Arm Limited. All rights reserved. + * Copyright (c) 2022-2025, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -22,7 +22,12 @@ /******************************************************************************* * CPU Power Control register specific definitions ******************************************************************************/ -#define NEOVERSE_V3_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define NEOVERSE_V3_CPUPWRCTLR_EL1 S3_0_C15_C2_7 #define NEOVERSE_V3_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) +/******************************************************************************* + * CPU Auxiliary control register 6 specific definitions + ******************************************************************************/ +#define NEOVERSE_V3_CPUACTLR6_EL1 S3_0_C15_C8_1 + #endif /* NEOVERSE_V3_H */ diff --git a/lib/cpus/aarch64/neoverse_v3.S b/lib/cpus/aarch64/neoverse_v3.S index 4346d7d44..1f3db2bc6 100644 --- a/lib/cpus/aarch64/neoverse_v3.S +++ b/lib/cpus/aarch64/neoverse_v3.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2024, Arm Limited. All rights reserved. + * Copyright (c) 2022-2025, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -46,6 +46,17 @@ workaround_reset_end neoverse_v3, CVE(2022,23960) check_erratum_chosen neoverse_v3, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 +workaround_reset_start neoverse_v3, CVE(2024, 7881), WORKAROUND_CVE_2024_7881 + /* --------------------------------- + * Sets BIT41 of CPUACTLR6_EL1 which + * disables L1 Data cache prefetcher + * --------------------------------- + */ + sysreg_bit_set NEOVERSE_V3_CPUACTLR6_EL1, BIT(41) +workaround_reset_end neoverse_v3, CVE(2024, 7881) + +check_erratum_chosen neoverse_v3, CVE(2024, 7881), WORKAROUND_CVE_2024_7881 + /* --------------------------------------------- * HW will do the cache maintenance while powering down * ---------------------------------------------