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https://github.com/ARM-software/arm-trusted-firmware.git
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fix(xilinx): optimize logic to read IPI response
Optimize logic to read IPI response from firmware and avoid using temporary buffer. Also, use pointer instead of array as per standard format to pass by reference in function. Change-Id: I45ebaeacc932a11bbfd4b7d9b9c43b4ee8ee7df2 Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
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parent
97d48be016
commit
02943d0d8d
1 changed files with 18 additions and 31 deletions
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@ -164,10 +164,13 @@ enum pm_ret_status pm_ipi_send(const struct pm_proc *proc,
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*
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*/
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static enum pm_ret_status pm_ipi_buff_read(const struct pm_proc *proc,
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uint32_t value[PAYLOAD_ARG_CNT])
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uint32_t *value, size_t count)
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{
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size_t i;
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enum pm_ret_status ret;
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#if IPI_CRC_CHECK
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uint32_t crc;
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#endif
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uintptr_t buffer_base = proc->ipi->buffer_base +
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IPI_BUFFER_TARGET_REMOTE_OFFSET +
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IPI_BUFFER_RESP_OFFSET;
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@ -179,21 +182,20 @@ static enum pm_ret_status pm_ipi_buff_read(const struct pm_proc *proc,
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* buf-2: unused
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* buf-3: unused
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*/
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for (i = 0; i < PAYLOAD_ARG_CNT; i++) {
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value[i] = mmio_read_32(buffer_base + (i * PAYLOAD_ARG_SIZE));
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for (i = 0U; i < count; i++) {
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value[i] = mmio_read_32(buffer_base + ((i + 1U) * PAYLOAD_ARG_SIZE));
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}
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ret = value[0];
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ret = mmio_read_32(buffer_base);
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#if IPI_CRC_CHECK
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if (value[PAYLOAD_CRC_POS] !=
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calculate_crc(value, IPI_W0_TO_W6_SIZE)) {
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NOTICE("ERROR in CRC response payload value:0x%x\n",
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value[PAYLOAD_CRC_POS]);
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crc = mmio_read_32(buffer_base + (PAYLOAD_CRC_POS * PAYLOAD_ARG_SIZE));
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if (crc != calculate_crc((uint32_t *)buffer_base, IPI_W0_TO_W6_SIZE)) {
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NOTICE("ERROR in CRC response payload value:0x%x\n", crc);
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ret = PM_RET_ERROR_INVALID_CRC;
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/* Payload data is invalid as CRC validation failed
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* Clear the payload to avoid leakage of data to upper layers
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*/
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memset(value, 0, PAYLOAD_ARG_CNT);
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memset(value, 0, count);
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}
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#endif
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@ -216,9 +218,7 @@ enum pm_ret_status pm_ipi_buff_read_callb(uint32_t *value, size_t count)
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{
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size_t i;
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#if IPI_CRC_CHECK
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uint32_t *payload_ptr = value;
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size_t j;
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unsigned int response_payload[PAYLOAD_ARG_CNT] = {0};
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uint32_t crc;
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#endif
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uintptr_t buffer_base = IPI_BUFFER_REMOTE_BASE +
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IPI_BUFFER_TARGET_LOCAL_OFFSET +
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@ -230,24 +230,17 @@ enum pm_ret_status pm_ipi_buff_read_callb(uint32_t *value, size_t count)
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}
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for (i = 0; i < count; i++) {
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*value = mmio_read_32(buffer_base + (i * PAYLOAD_ARG_SIZE));
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value++;
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value[i] = mmio_read_32(buffer_base + (i * PAYLOAD_ARG_SIZE));
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}
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#if IPI_CRC_CHECK
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for (j = 0; j < PAYLOAD_ARG_CNT; j++) {
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response_payload[j] = mmio_read_32(buffer_base +
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(j * PAYLOAD_ARG_SIZE));
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}
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if (response_payload[PAYLOAD_CRC_POS] !=
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calculate_crc(response_payload, IPI_W0_TO_W6_SIZE)) {
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NOTICE("ERROR in CRC response payload value:0x%x\n",
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response_payload[PAYLOAD_CRC_POS]);
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crc = mmio_read_32(buffer_base + (PAYLOAD_CRC_POS * PAYLOAD_ARG_SIZE));
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if (crc != calculate_crc((uint32_t *)buffer_base, IPI_W0_TO_W6_SIZE)) {
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NOTICE("ERROR in CRC response payload value:0x%x\n", crc);
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ret = PM_RET_ERROR_INVALID_CRC;
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/* Payload data is invalid as CRC validation failed
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* Clear the payload to avoid leakage of data to upper layers
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*/
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memset(payload_ptr, 0, count);
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memset(value, 0, count);
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}
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#endif
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return ret;
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@ -271,7 +264,6 @@ enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
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uint32_t *value, size_t count)
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{
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enum pm_ret_status ret;
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uint32_t i, ret_payload[PAYLOAD_ARG_CNT] = {0U};
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pm_ipi_lock_get();
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@ -280,12 +272,7 @@ enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
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goto unlock;
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}
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ret = ERROR_CODE_MASK & (pm_ipi_buff_read(proc, ret_payload));
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for (i = 1U; i <= count; i++) {
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*value = ret_payload[i];
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value++;
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}
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ret = ERROR_CODE_MASK & (pm_ipi_buff_read(proc, value, count));
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unlock:
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pm_ipi_lock_release();
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