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zynqmp: Revise memory configuration options

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Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration provides one default setup (ATF in OCM,
BL32 in DRAM). Additionally, the new configuration options
 - ZYNQMP_ATF_MEM_BASE
 - ZYNQMP_ATF_MEM_SIZE
 - ZYNQMP_BL32_MEM_BASE
 - ZYNQMP_BL32_MEM_SIZE
can be used to freely configure the memory locations used for ATF and
secure payload.

Also, allow setting the BL33 entry point via PRELOADED_BL33_BASE.

Cc: petalinux-dev@xilinx.com
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
This commit is contained in:
Soren Brinkmann 2016-04-14 10:27:00 -07:00
parent 1c87351bfd
commit 01555332fa
4 changed files with 52 additions and 87 deletions
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12
docs/plat/xilinx-zynqmp.md
View file

@ -21,14 +21,10 @@ make ERROR_DEPRECATED=1 RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=zyn
```
# ZynqMP platform specific build options
* `ZYNQMP_ATF_LOCATION`: Specifies the location of the bl31 binary. Options:
- `tsram` : bl31 will be located in OCM (default)
- `tdram` : bl31 will be located in DRAM (address: 0x30000000)
* `ZYNQMP_TSP_RAM_LOCATION`: Specifies the location of the bl32 binary and
secure payload dispatcher. Options:
- `tsram` : bl32/spd will be located in OCM (default)
- `tdram` : bl32/spd will be located in DRAM (address: 0x30000000)
* `ZYNQMP_ATF_MEM_BASE`: Specifies the base address of the bl31 binary.
* `ZYNQMP_ATF_MEM_SIZE`: Specifies the size of the memory region of the bl31 binary.
* `ZYNQMP_BL32_MEM_BASE`: Specifies the base address of the bl32 binary.
* `ZYNQMP_BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary.
# Power Domain Tree
The following power domain tree represents the power domain model used by the

66
plat/xilinx/zynqmp/include/platform_def.h
View file

@ -50,56 +50,50 @@
/*******************************************************************************
* BL31 specific defines.
******************************************************************************/
#define ZYNQMP_BL31_SIZE 0x1b000
/*
* Put BL31 at the top of the Trusted SRAM (just below the shared memory, if
* present). BL31_BASE is calculated using the current BL31 debug size plus a
* little space for growth.
*/
#if ZYNQMP_ATF_LOCATION_ID == ZYNQMP_IN_TRUSTED_SRAM
# define BL31_BASE (ZYNQMP_TRUSTED_SRAM_LIMIT - \
ZYNQMP_BL31_SIZE)
# define BL31_PROGBITS_LIMIT (ZYNQMP_TRUSTED_SRAM_LIMIT - 0x6000)
# define BL31_LIMIT ZYNQMP_TRUSTED_SRAM_LIMIT
#elif ZYNQMP_ATF_LOCATION_ID == ZYNQMP_IN_TRUSTED_DRAM
# define BL31_BASE (ZYNQMP_TRUSTED_DRAM_LIMIT - \
ZYNQMP_BL31_SIZE)
# define BL31_PROGBITS_LIMIT (ZYNQMP_TRUSTED_DRAM_LIMIT - 0x6000)
# define BL31_LIMIT (ZYNQMP_TRUSTED_DRAM_BASE + \
ZYNQMP_TRUSTED_DRAM_SIZE)
#ifndef ZYNQMP_ATF_MEM_BASE
# define BL31_BASE 0xfffe5000
# define BL31_PROGBITS_LIMIT 0xffffa000
# define BL31_LIMIT 0xffffffff
#else
# error "Unsupported ZYNQMP_ATF_LOCATION_ID value"
# define BL31_BASE (ZYNQMP_ATF_MEM_BASE)
# define BL31_LIMIT (ZYNQMP_ATF_MEM_BASE + ZYNQMP_ATF_MEM_SIZE - 1)
# ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
# define BL31_PROGBITS_LIMIT (ZYNQMP_ATF_MEM_BASE + ZYNQMP_ATF_MEM_PROGBITS_SIZE - 1)
# endif
#endif
/*******************************************************************************
* BL32 specific defines.
******************************************************************************/
/*
* On ZYNQMP, the TSP can execute either from Trusted SRAM or Trusted DRAM.
*/
#if ZYNQMP_TSP_RAM_LOCATION_ID == ZYNQMP_IN_TRUSTED_SRAM
# define TSP_SEC_MEM_BASE ZYNQMP_TRUSTED_SRAM_BASE
# define TSP_SEC_MEM_SIZE ZYNQMP_TRUSTED_SRAM_SIZE
# define TSP_PROGBITS_LIMIT (ZYNQMP_TRUSTED_SRAM_LIMIT - \
ZYNQMP_BL31_SIZE)
# define BL32_BASE ZYNQMP_TRUSTED_SRAM_BASE
# define BL32_LIMIT (ZYNQMP_TRUSTED_SRAM_LIMIT - \
ZYNQMP_BL31_SIZE)
#elif ZYNQMP_TSP_RAM_LOCATION_ID == ZYNQMP_IN_TRUSTED_DRAM
# define TSP_SEC_MEM_BASE ZYNQMP_TRUSTED_DRAM_BASE
# define TSP_SEC_MEM_SIZE (ZYNQMP_TRUSTED_DRAM_LIMIT - \
ZYNQMP_BL31_SIZE)
# define BL32_BASE ZYNQMP_TRUSTED_DRAM_BASE
# define BL32_LIMIT (ZYNQMP_TRUSTED_DRAM_LIMIT - \
ZYNQMP_BL31_SIZE)
#ifndef ZYNQMP_BL32_MEM_BASE
# define BL32_BASE 0x60000000
# define BL32_LIMIT 0x7fffffff
#else
# error "Unsupported ZYNQMP_TSP_RAM_LOCATION_ID value"
# define BL32_BASE (ZYNQMP_BL32_MEM_BASE)
# define BL32_LIMIT (ZYNQMP_BL32_MEM_BASE + ZYNQMP_BL32_MEM_SIZE - 1)
#endif
/*
* ID of the secure physical generic timer interrupt used by the TSP.
*/
/*******************************************************************************
* BL33 specific defines.
******************************************************************************/
#ifndef PRELOADED_BL33_BASE
# define PLAT_ARM_NS_IMAGE_OFFSET 0x8000000
#else
# define PLAT_ARM_NS_IMAGE_OFFSET PRELOADED_BL33_BASE
#endif
/*******************************************************************************
* TSP specific defines.
******************************************************************************/
#define TSP_SEC_MEM_BASE BL32_BASE
#define TSP_SEC_MEM_SIZE (BL32_LIMIT - BL32_BASE + 1)
/* ID of the secure physical generic timer interrupt used by the TSP */
#define TSP_IRQ_SEC_PHY_TIMER ARM_IRQ_SEC_PHY_TIMER
/*******************************************************************************

38
plat/xilinx/zynqmp/platform.mk
View file

@ -31,29 +31,27 @@ PROGRAMMABLE_RESET_ADDRESS := 1
PSCI_EXTENDED_STATE_ID := 1
A53_DISABLE_NON_TEMPORAL_HINT := 0
ZYNQMP_ATF_LOCATION ?= tsram
ifeq (${ZYNQMP_ATF_LOCATION}, tsram)
ZYNQMP_ATF_LOCATION_ID := ZYNQMP_IN_TRUSTED_SRAM
else ifeq (${ZYNQMP_ATF_LOCATION}, tdram)
ZYNQMP_ATF_LOCATION_ID := ZYNQMP_IN_TRUSTED_DRAM
else
$(error "Unsupported ZYNQMP_ATF_LOCATION value")
ifdef ZYNQMP_ATF_MEM_BASE
$(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
ifndef ZYNQMP_ATF_MEM_SIZE
$(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE")
endif
$(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
$(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
endif
endif
# On ZYNQMP, the TSP can execute either from Trusted SRAM or Trusted DRAM.
# Trusted SRAM is the default.
ZYNQMP_TSP_RAM_LOCATION ?= tsram
ifeq (${ZYNQMP_TSP_RAM_LOCATION}, tsram)
ZYNQMP_TSP_RAM_LOCATION_ID := ZYNQMP_IN_TRUSTED_SRAM
else ifeq (${ZYNQMP_TSP_RAM_LOCATION}, tdram)
ZYNQMP_TSP_RAM_LOCATION_ID := ZYNQMP_IN_TRUSTED_DRAM
else
$(error "Unsupported ZYNQMP_TSP_RAM_LOCATION value")
endif
ifdef ZYNQMP_BL32_MEM_BASE
$(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
# Process flags
$(eval $(call add_define,ZYNQMP_ATF_LOCATION_ID))
$(eval $(call add_define,ZYNQMP_TSP_RAM_LOCATION_ID))
ifndef ZYNQMP_BL32_MEM_SIZE
$(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE")
endif
$(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
endif
PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
-Iinclude/plat/arm/common/aarch64/ \

23
plat/xilinx/zynqmp/zynqmp_def.h
View file

@ -43,19 +43,6 @@
/*******************************************************************************
* ZYNQMP memory map related constants
******************************************************************************/
#define ZYNQMP_TRUSTED_SRAM_BASE 0xFFFC0000
#define ZYNQMP_TRUSTED_SRAM_SIZE 0x00040000
#define ZYNQMP_TRUSTED_SRAM_LIMIT (ZYNQMP_TRUSTED_SRAM_BASE + \
ZYNQMP_TRUSTED_SRAM_SIZE)
/* Location of trusted dram on the base zynqmp */
#define ZYNQMP_TRUSTED_DRAM_BASE 0x30000000 /* Can't overlap TZROM area */
#define ZYNQMP_TRUSTED_DRAM_SIZE 0x10000000
#define ZYNQMP_TRUSTED_DRAM_LIMIT (ZYNQMP_TRUSTED_DRAM_BASE + \
ZYNQMP_TRUSTED_DRAM_SIZE)
/* Aggregate of all devices in the first GB */
#define DEVICE0_BASE 0xFF000000
#define DEVICE0_SIZE 0x00E00000
@ -114,16 +101,6 @@
#define PMU_GLOBAL_CNTRL_FW_IS_PRESENT (1 << 4)
#define DRAM1_BASE 0x00000000ull
#define DRAM1_SIZE 0x10000000ull
#define DRAM1_END (DRAM1_BASE + DRAM1_SIZE - 1)
#define DRAM_BASE DRAM1_BASE
#define DRAM_SIZE DRAM1_SIZE
/* Load address of BL33 in the ZYNQMP port */
#define PLAT_ARM_NS_IMAGE_OFFSET (DRAM1_BASE + 0x8000000) /* DRAM + 128MB */
/*******************************************************************************
* CCI-400 related constants
******************************************************************************/