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errata: workaround for Cortex-A78 errata 1952683

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Cortex-A78 erratum 1952683 is a Cat B erratum present in r0p0 of
the Cortex-A78 processor core, and it was fixed in r1p0.

A78 SDEN : https://developer.arm.com/documentation/SDEN1401784/1400

Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com>
Change-Id: I77b03e695532cb13e8f8d3f00c43d973781ceeb0
This commit is contained in:
nayanpatel-arm 2021-08-11 13:33:00 -07:00
parent 9fcefe38d5
commit 00bee99761
3 changed files with 61 additions and 0 deletions
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3
docs/design/cpu-specific-build-macros.rst
View file

@ -281,6 +281,9 @@ For Cortex-A78, the following errata build flags are defined :
- ``ERRATA_A78_1821534``: This applies errata 1821534 workaround to Cortex-A78
CPU. This needs to be enabled for revisions r0p0 and r1p0.
- ``ERRATA_A78_1952683``: This applies errata 1952683 workaround to Cortex-A78
CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
For Cortex-A78 AE, the following errata build flags are defined :
- ``ERRATA_A78_AE_1951502`` : This applies errata 1951502 workaround to Cortex-A78

50
lib/cpus/aarch64/cortex_a78.S
View file

@ -154,6 +154,50 @@ func check_errata_1821534
b cpu_rev_var_ls
endfunc check_errata_1821534
/* --------------------------------------------------
* Errata Workaround for Cortex A78 Errata 1952683.
* This applies to revision r0p0.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_a78_1952683_wa
/* Check revision. */
mov x17, x30
bl check_errata_1952683
cbz x0, 1f
ldr x0,=0x5
msr S3_6_c15_c8_0,x0
ldr x0,=0xEEE10A10
msr S3_6_c15_c8_2,x0
ldr x0,=0xFFEF0FFF
msr S3_6_c15_c8_3,x0
ldr x0,=0x0010F000
msr S3_6_c15_c8_4,x0
ldr x0,=0x0010F000
msr S3_6_c15_c8_5,x0
ldr x0,=0x40000080023ff
msr S3_6_c15_c8_1,x0
ldr x0,=0x6
msr S3_6_c15_c8_0,x0
ldr x0,=0xEE640F34
msr S3_6_c15_c8_2,x0
ldr x0,=0xFFEF0FFF
msr S3_6_c15_c8_3,x0
ldr x0,=0x40000080023ff
msr S3_6_c15_c8_1,x0
isb
1:
ret x17
endfunc errata_a78_1952683_wa
func check_errata_1952683
/* Applies to r0p0 only */
mov x1, #0x00
b cpu_rev_var_ls
endfunc check_errata_1952683
/* -------------------------------------------------
* The CPU Ops reset function for Cortex-A78
* -------------------------------------------------
@ -183,6 +227,11 @@ func cortex_a78_reset_func
bl errata_a78_1821534_wa
#endif
#if ERRATA_A78_1952683
mov x0, x18
bl errata_a78_1952683_wa
#endif
#if ENABLE_AMU
/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
mrs x0, actlr_el3
@ -241,6 +290,7 @@ func cortex_a78_errata_report
report_errata ERRATA_A78_1941498, cortex_a78, 1941498
report_errata ERRATA_A78_1951500, cortex_a78, 1951500
report_errata ERRATA_A78_1821534, cortex_a78, 1821534
report_errata ERRATA_A78_1952683, cortex_a78, 1952683
ldp x8, x30, [sp], #16
ret

8
lib/cpus/cpu-ops.mk
View file

@ -319,6 +319,10 @@ ERRATA_A78_AE_1951502 ?=0
# to revisions r0p0 and r1p0 of the A78 cpu.
ERRATA_A78_1821534 ?=0
# Flag to apply erratum 1952683 workaround during reset. This erratum applies
# to revision r0p0 of the A78 cpu and was fixed in the revision r1p0.
ERRATA_A78_1952683 ?=0
# Flag to apply T32 CLREX workaround during reset. This erratum applies
# only to r0p0 and r1p0 of the Neoverse N1 cpu.
ERRATA_N1_1043202 ?=0
@ -658,6 +662,10 @@ $(eval $(call add_define,ERRATA_A78_AE_1951502))
$(eval $(call assert_boolean,ERRATA_A78_1821534))
$(eval $(call add_define,ERRATA_A78_1821534))
# Process ERRATA_A78_1952683 flag
$(eval $(call assert_boolean,ERRATA_A78_1952683))
$(eval $(call add_define,ERRATA_A78_1952683))
# Process ERRATA_N1_1043202 flag
$(eval $(call assert_boolean,ERRATA_N1_1043202))
$(eval $(call add_define,ERRATA_N1_1043202))