/*
 * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/dts-v1/;

#include <platform_def.h>

/ {
#define MODE_SEL0	(0x1)
#define MODE_SEL1	(0x2)

#define SECURE_RO 0x1
#define SECURE_RW 0x3
#define SECURE_EXECUTE_RO 0x5
#define SECURE_EXECUTE_RW 0x7
#define NON_SECURE_RO 0x9
#define NON_SECURE_RW 0xB
#define NON_SECURE_EXECUTE_RO 0xD
#define NON_SECURE_EXECUTE_RW 0xF
	/*
	 * FF-A compatible Secure Partition Manager parses the
	 * config file and fetch the following booting arguments to
	 * pass on to the StandAloneMM(StMM) Secure Partition.
	 */
	compatible = "arm,ffa-manifest-1.0";

	description = "FVP Base StandaloneMm";
	ffa-version = <0x00010002>; /* 31:16 - Major, 15:0 - Minor */
	uuid = <0xdcae8d37 0x46446bf0 0xab401483 0xa3873c93>;
	id = <0x8001>;
	execution-ctx-count = <PLATFORM_CORE_COUNT>;
	exception-level = <MODE_SEL0>; /* SEL0*/
	execution-state = <0>; /* AArch64*/
	load-address = <0x0 0xff200000>;
	image-size = <0x0 0x00300000>;
	xlat-granule = <0>; /* 4KiB */
	boot-order = <0>;
	messaging-method = <0x603>; /* Direct req/resp/req2/resp2 supported. */
	gp-register-num = <0>;

	device-regions {
		compatible = "arm,ffa-manifest-device-regions";

		/**
		 * System registers, rtc, uart and etc regions for access from S-EL0.
		 */
		io_fpga {
			base-address = <0x0 0x1C000000>;
			pages-count = <0x3000>;
			attributes = <SECURE_RW>;
		};

		system_reg_el0 {
			base-address = <0x0 0x1C010000>;
			pages-count = <0x10>;
			attributes = <SECURE_RW>;
		};

		/**
		 * ARM CSS SoC Peripherals area.
		 * Similar to SOC_CSS_MAP_DEVICE.
		 */
		soc_components {
			base-address = <0x0 0x20000000>;
			pages-count = <0xc200>;
			attributes = <SECURE_RO>;
		};

		/**
		 * NOR0 Flash region, used for Firmware Image Update.
		 */
		nor_flash0 {
			base-address = <0x0 0x08000000>;
			pages-count = <0x4000>;
			attributes = <SECURE_RW>;
		};

		/**
		 * NOR1 Flash region, used for Secure booting.
		 */
		nor_flash1 {
			base-address = <0x0 0x0c000000>;
			pages-count = <0x4000>;
			attributes = <SECURE_RW>;
		};
	};

	memory-regions {
		compatible = "arm,ffa-manifest-memory-regions";

		/*
		 * SPM Payload memory. Mapped as code region for S-EL0
		 * Similar to ARM_SP_IMAGE_MMAP.
		 */
		stmm_region {
			description = "image";
			base-address = <0x0 0xff200000>;
			pages-count = <0x300>;
			/* StMM will remap the regions during runtime */
			attributes = <SECURE_EXECUTE_RO>;
		};

		/*
		 * Memory shared between EL3 and S-EL0.
		 * Similar to ARM_SPM_BUF_EL0_MMAP.
		 */
		rx-tx-buffers {
			description = "shared-buff";
			base-address = <0x0 0xff500000>;
			pages-count = <0x100>;
			attributes = <SECURE_RW>;
		};

		/*
		 * Memory shared between Normal world and S-EL0.
		 * Similar to ARM_SP_IMAGE_NS_BUF_MMAP.
		 */
		ns_comm_buffer {
			/*
			 * Description is needed for StMM to identify
			 * ns-communication buffer.
			 */
			description = "ns-comm";
			base-address = <0x0 0xff600000>;
			pages-count = <0x10>;
			attributes = <NON_SECURE_RW>;
		};

		/*
		 * Heap used by SP to allocate memory for DMA.
		 */
		heap {
			/*
			 * Description is needed for StMM to identify
			 * heap buffer.
			 */
			description = "heap";
			base-address = <0x0 0xFF610000>;
			pages-count = <0x7F0>;
			attributes = <SECURE_RW>;
		};
	};
};
